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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v2] nested VMX: fix I/O port exit emulation
Andrew Cooper wrote on 2013-12-04:
> On 04/12/2013 01:51, Zhang, Yang Z wrote:
>> Jan Beulich wrote on 2013-12-03:
>>> For multi-byte operations all affected ports' bits in the bitmap
>>> need to be checked, not just the first port's one.
>>>
>>> Reported-by: Matthew Daley <mattd@xxxxxxxxxxx>
>>> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
>>> ---
>>> v2: Fix loop construct.
>>>
>>> --- a/xen/arch/x86/hvm/vmx/vvmx.c
>>> +++ b/xen/arch/x86/hvm/vmx/vvmx.c
>>> @@ -2134,7 +2134,6 @@ int nvmx_n2_vmexit_handler(struct cpu_us
>>> struct nestedvcpu *nvcpu = &vcpu_nestedhvm(v);
>>> struct nestedvmx *nvmx = &vcpu_2_nvmx(v);
>>> u32 ctrl;
>>> - u8 *bitmap;
>>>
>>> nvcpu->nv_vmexit_pending = 0;
>>> nvmx->intr.intr_info = 0;
>>> @@ -2220,15 +2219,23 @@ int nvmx_n2_vmexit_handler(struct cpu_us
>>> if ( ctrl & CPU_BASED_ACTIVATE_IO_BITMAP )
>>> {
>>> unsigned long qual;
>>> - u16 port;
>>> + u16 port, size;
>>>
>>> __vmread(EXIT_QUALIFICATION, &qual);
>>> port = qual >> 16;
>>> - bitmap = nvmx->iobitmap[port >> 15];
>>> - if ( bitmap[(port & 0x7fff) >> 3] & (1 << (port & 0x7)) )
>>> - nvcpu->nv_vmexit_pending = 1;
>>> + size = (qual & 7) + 1;
>>> + do {
>>> + const u8 *bitmap = nvmx->iobitmap[port >> 15];
>>> +
>>> + if ( bitmap[(port & 0x7fff) >> 3] & (1 << (port & 7)) )
>>> + nvcpu->nv_vmexit_pending = 1;
>>> + if ( !--size )
>>> + break;
>>> + if ( !++port )
>>> + nvcpu->nv_vmexit_pending = 1;
>> If port overflow, will it cause vmexit or maybe other fault like GP
>> or just be
> ignored? Also, you need to check the DF bit to know the string
> direction before updating the port.
>>
>> Best regards,
>> Yang
>>
>>
>
> What does the direction flag have to do with the port(s) used as the
> target of an ins/outs instruction? I was under the impression that it
> solely acted as an increment/decrement on si/di.
>
Uh.. It seems DF only impact the memory location, ioport is not affected, See
what SDM said.
After the byte, word, or doubleword is transfer from the I/O port to the memory
location, the DI/EDI/RDI register
is incremented or decremented automatically according to the setting of the DF
flag in the EFLAGS register. (If the
DF flag is 0, the (E)DI register is incremented; if the DF flag is 1, the (E)DI
register is decremented.) The (E)DI
register is incremented or decremented by 1 for byte operations, by 2 for word
operations, or by 4 for doubleword
operations.
> ~Andrew
Best regards,
Yang
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