diff -r f4552d9f6afb xen/include/asm-x86/io_apic.h
--- a/xen/include/asm-x86/io_apic.h	Tue Sep 23 17:11:33 2008 +0100
+++ b/xen/include/asm-x86/io_apic.h	Fri Sep 26 14:02:35 2008 +0800
@@ -125,7 +125,8 @@ extern int mpc_default_type;
 
 static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
 {
-	if (iommu_enabled)
+	/* Only need to remap ioapic RTE (reg: 10~3Fh) */
+	if (iommu_enabled && reg >= 0x10)
 		return io_apic_read_remap_rte(apic, reg);
 	*IO_APIC_BASE(apic) = reg;
 	return *(IO_APIC_BASE(apic)+4);
@@ -133,7 +134,8 @@ static inline unsigned int io_apic_read(
 
 static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
 {
-	if (iommu_enabled)
+	/* Only need to remap ioapic RTE (reg: 10~3Fh) */
+	if (iommu_enabled && reg >= 0x10)
 		return iommu_update_ire_from_apic(apic, reg, value);
 	*IO_APIC_BASE(apic) = reg;
 	*(IO_APIC_BASE(apic)+4) = value;
@@ -152,7 +154,8 @@ extern int sis_apic_bug;
 #endif
 static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
 {
-	if (iommu_enabled)
+	/* Only need to remap ioapic RTE (reg: 10~3Fh) */
+	if (iommu_enabled && reg >= 0x10)
 		return iommu_update_ire_from_apic(apic, reg, value);
 	if (sis_apic_bug)
 		*IO_APIC_BASE(apic) = reg;