diff -r 34ff26fb2240 tools/firmware/acpi/Makefile --- a/tools/firmware/acpi/Makefile Mon Jun 12 12:01:32 2006 +0100 +++ b/tools/firmware/acpi/Makefile Thu Jun 15 16:05:13 2006 -0700 @@ -33,17 +33,16 @@ IASL_URL=http://developer.intel.com/technology/iapc/acpi/downloads/$(IASL_VER).tar.gz vpath iasl $(PATH) -.PHONY: all all:$(ACPI_BIN) acpi_dsdt.c:acpi_dsdt.asl $(MAKE) iasl - iasl -oa -tc acpi_dsdt.asl + iasl -tc acpi_dsdt.asl mv acpi_dsdt.hex acpi_dsdt.c echo "int DsdtLen=sizeof(AmlCode);" >> acpi_dsdt.c rm *.aml +# iasl -oa -tc acpi_dsdt.asl -.PHONY: iasl iasl: @echo @echo "ACPI ASL compiler(iasl) is needed" @@ -62,10 +61,8 @@ $(ACPI_BIN):$(ACPI_GEN) ./$(ACPI_GEN) $(ACPI_BIN) -.PHONY: clean clean: rm -rf *.o $(ACPI_GEN) $(ACPI_BIN) $(IASL_VER) rm -rf $(IASL_VER).tar.gz -.PHONY: install install: all diff -r 34ff26fb2240 tools/firmware/acpi/acpi2_0.h --- a/tools/firmware/acpi/acpi2_0.h Mon Jun 12 12:01:32 2006 +0100 +++ b/tools/firmware/acpi/acpi2_0.h Thu Jun 15 16:05:13 2006 -0700 @@ -323,7 +323,7 @@ // The physical that acpi table reside in the guest BIOS //#define ACPI_PHYSICAL_ADDRESS 0xE2000 #define ACPI_PHYSICAL_ADDRESS 0xEA000 -#define ACPI_TABLE_SIZE (2*1024) //Currently 2K is enough +#define ACPI_TABLE_SIZE (4*1024) //Currently 4K is enough void AcpiBuildTable(uint8_t* buf); diff -r 34ff26fb2240 tools/firmware/acpi/acpi_dsdt.asl --- a/tools/firmware/acpi/acpi_dsdt.asl Mon Jun 12 12:01:32 2006 +0100 +++ b/tools/firmware/acpi/acpi_dsdt.asl Thu Jun 15 16:05:13 2006 -0700 @@ -20,7 +20,7 @@ //** //** -DefinitionBlock ("DSDT.aml", "DSDT", 1, "INTEL ", "XEN ", 2) +DefinitionBlock ("DSDT.aml", "DSDT", 1, "INTEL","int-xen", 2006) { Name (\PMBS, 0x0C00) Name (\PMLN, 0x08) @@ -29,23 +29,16 @@ Name (\APCB, 0xFEC00000) Name (\APCL, 0x00010000) Name (\PUID, 0x00) + Scope (\_PR) { Processor (CPU0, 0x00, 0x00000000, 0x00) {} Processor (CPU1, 0x01, 0x00000000, 0x00) {} Processor (CPU2, 0x02, 0x00000000, 0x00) {} Processor (CPU3, 0x03, 0x00000000, 0x00) {} + } -/* Poweroff support - ties in with qemu emulation */ - - Name (\_S5, Package (0x04) - { - 0x07, - 0x07, - 0x00, - 0x00 - }) Scope (\_SB) { @@ -55,9 +48,11 @@ Name (_UID, 0x00) Name (_ADR, 0x00) Name (_BBN, 0x00) + Method (_CRS, 0, NotSerialized) { - Name (PRT0, ResourceTemplate () + + Name (PRT0, ResourceTemplate () { /* bus number is from 0 - 255*/ WordBusNumber (ResourceConsumer, MinFixed, MaxFixed, SubDecode, @@ -79,75 +74,67 @@ 0x0FFF, 0x0000, 0x0300) + + /* reserve what device model consumed for IDE and acpi pci device */ + WordIO (ResourceConsumer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, + 0xc000, + 0xc01f, + 0x0000, + 0x0020) + /* reserve what device model consumed for Ethernet controller pci device */ + WordIO (ResourceConsumer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, + 0xc020, + 0xc03f, + 0x0000, + 0x0010) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadOnly, 0x00000000, - 0x000A0000, + 0x000c0000, 0x000FFFFF, 0x00000000, - 0x00060000) + 0x00030000) + + /* reserve what device model consumed for PCI VGA device */ + + DWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, + 0xF0000000, + 0xF1FFFFFF, + 0x00000000, + 0x02000000) + DWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, + 0xF2000000, + 0xF2000FFF, + 0x00000000, + 0x00001000) + /* reserve what device model consumed for Ethernet controller pci device */ + DWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, + 0xF2001000, + 0xF200101F, + 0x00000000, + 0x00000020) }) Return (PRT0) } - - Name (AIR0, Package (0x06) - { - Package (0x04) - { - 0x001FFFFF, - 0x02, - 0x00, - 0x17 - }, - - Package (0x04) - { - 0x001FFFFF, - 0x03, - 0x00, - 0x13 - }, - - Package (0x04) - { - 0x001DFFFF, - 0x01, - 0x00, - 0x13 - }, - - Package (0x04) - { - 0x001DFFFF, - 0x00, - 0x00, - 0x10 - }, - - Package (0x04) - { - 0x001DFFFF, - 0x02, - 0x00, - 0x12 - }, - - Package (0x04) - { - 0x001DFFFF, - 0x03, - 0x00, - 0x17 - } - }) - Method (_PRT, 0, NotSerialized) - { - Return (AIR0) - } - + Device (ISA) { - Name (_ADR, 0x00010000) /*TODO, device id, PCI bus num, ...*/ - + Name (_ADR, 0x00000000) /* device id, PCI bus num, ... */ + + OperationRegion(PIRQ, PCI_Config, 0x60, 0x4) + Scope(\) { + Field (\_SB.PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve) { + PIRA, 8, + PIRB, 8, + PIRC, 8, + PIRD, 8 + } + } Device (SYSR) { Name (_HID, EisaId ("PNP0C02")) diff -r 34ff26fb2240 tools/firmware/acpi/acpi_dsdt.c --- a/tools/firmware/acpi/acpi_dsdt.c Mon Jun 12 12:01:32 2006 +0100 +++ b/tools/firmware/acpi/acpi_dsdt.c Thu Jun 15 16:05:13 2006 -0700 @@ -1,22 +1,22 @@ /* * * Intel ACPI Component Architecture - * ASL Optimizing Compiler / AML Disassembler version 20050624 [Aug 24 2005] + * ASL Optimizing Compiler / AML Disassembler version 20050513 [Jun 8 2005] * Copyright (C) 2000 - 2005 Intel Corporation * Supports ACPI Specification Revision 3.0 * - * Compilation of "acpi_dsdt.asl" - Thu May 4 17:42:00 2006 + * Compilation of "acpi_dsdt.asl" - Thu Jun 15 16:01:53 2006 * * C source code output * */ unsigned char AmlCode[] = { - 0x44,0x53,0x44,0x54,0x7C,0x04,0x00,0x00, /* 00000000 "DSDT|..." */ - 0x01,0x72,0x49,0x4E,0x54,0x45,0x4C,0x20, /* 00000008 ".rINTEL " */ - 0x58,0x45,0x4E,0x20,0x20,0x20,0x20,0x20, /* 00000010 "XEN " */ - 0x02,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */ - 0x24,0x06,0x05,0x20,0x08,0x50,0x4D,0x42, /* 00000020 "$.. .PMB" */ + 0x44,0x53,0x44,0x54,0xB1,0x04,0x00,0x00, /* 00000000 "DSDT...." */ + 0x01,0x13,0x49,0x4E,0x54,0x45,0x4C,0x00, /* 00000008 "..INTEL." */ + 0x69,0x6E,0x74,0x2D,0x78,0x65,0x6E,0x00, /* 00000010 "int-xen." */ + 0xD6,0x07,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */ + 0x13,0x05,0x05,0x20,0x08,0x50,0x4D,0x42, /* 00000020 "... .PMB" */ 0x53,0x0B,0x00,0x0C,0x08,0x50,0x4D,0x4C, /* 00000028 "S....PML" */ 0x4E,0x0A,0x08,0x08,0x49,0x4F,0x42,0x31, /* 00000030 "N...IOB1" */ 0x00,0x08,0x49,0x4F,0x4C,0x31,0x00,0x08, /* 00000038 "..IOL1.." */ @@ -30,131 +30,138 @@ 0x00,0x5B,0x83,0x0B,0x43,0x50,0x55,0x32, /* 00000078 ".[..CPU2" */ 0x02,0x00,0x00,0x00,0x00,0x00,0x5B,0x83, /* 00000080 "......[." */ 0x0B,0x43,0x50,0x55,0x33,0x03,0x00,0x00, /* 00000088 ".CPU3..." */ - 0x00,0x00,0x00,0x08,0x5F,0x53,0x35,0x5F, /* 00000090 "...._S5_" */ - 0x12,0x08,0x04,0x0A,0x07,0x0A,0x07,0x00, /* 00000098 "........" */ - 0x00,0x10,0x4A,0x3D,0x5F,0x53,0x42,0x5F, /* 000000A0 "..J=_SB_" */ - 0x5B,0x82,0x42,0x3D,0x50,0x43,0x49,0x30, /* 000000A8 "[.B=PCI0" */ - 0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0, /* 000000B0 "._HID.A." */ - 0x0A,0x03,0x08,0x5F,0x55,0x49,0x44,0x00, /* 000000B8 "..._UID." */ - 0x08,0x5F,0x41,0x44,0x52,0x00,0x08,0x5F, /* 000000C0 "._ADR.._" */ - 0x42,0x42,0x4E,0x00,0x14,0x4A,0x06,0x5F, /* 000000C8 "BBN..J._" */ - 0x43,0x52,0x53,0x00,0x08,0x50,0x52,0x54, /* 000000D0 "CRS..PRT" */ - 0x30,0x11,0x48,0x05,0x0A,0x54,0x88,0x0D, /* 000000D8 "0.H..T.." */ - 0x00,0x02,0x0F,0x00,0x00,0x00,0x00,0x00, /* 000000E0 "........" */ - 0xFF,0x00,0x00,0x00,0x00,0x01,0x47,0x01, /* 000000E8 "......G." */ - 0xF8,0x0C,0xF8,0x0C,0x01,0x08,0x88,0x0D, /* 000000F0 "........" */ - 0x00,0x01,0x0C,0x03,0x00,0x00,0x00,0x00, /* 000000F8 "........" */ - 0xF7,0x0C,0x00,0x00,0xF8,0x0C,0x88,0x0D, /* 00000100 "........" */ - 0x00,0x01,0x0C,0x03,0x00,0x00,0x00,0x0D, /* 00000108 "........" */ - 0xFF,0x0F,0x00,0x00,0x00,0x03,0x87,0x17, /* 00000110 "........" */ - 0x00,0x00,0x0C,0x02,0x00,0x00,0x00,0x00, /* 00000118 "........" */ - 0x00,0x00,0x0A,0x00,0xFF,0xFF,0x0F,0x00, /* 00000120 "........" */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00, /* 00000128 "........" */ - 0x79,0x00,0xA4,0x50,0x52,0x54,0x30,0x08, /* 00000130 "y..PRT0." */ - 0x41,0x49,0x52,0x30,0x12,0x4F,0x04,0x06, /* 00000138 "AIR0.O.." */ - 0x12,0x0C,0x04,0x0C,0xFF,0xFF,0x1F,0x00, /* 00000140 "........" */ - 0x0A,0x02,0x00,0x0A,0x17,0x12,0x0C,0x04, /* 00000148 "........" */ - 0x0C,0xFF,0xFF,0x1F,0x00,0x0A,0x03,0x00, /* 00000150 "........" */ - 0x0A,0x13,0x12,0x0B,0x04,0x0C,0xFF,0xFF, /* 00000158 "........" */ - 0x1D,0x00,0x01,0x00,0x0A,0x13,0x12,0x0B, /* 00000160 "........" */ - 0x04,0x0C,0xFF,0xFF,0x1D,0x00,0x00,0x00, /* 00000168 "........" */ - 0x0A,0x10,0x12,0x0C,0x04,0x0C,0xFF,0xFF, /* 00000170 "........" */ - 0x1D,0x00,0x0A,0x02,0x00,0x0A,0x12,0x12, /* 00000178 "........" */ - 0x0C,0x04,0x0C,0xFF,0xFF,0x1D,0x00,0x0A, /* 00000180 "........" */ - 0x03,0x00,0x0A,0x17,0x14,0x0B,0x5F,0x50, /* 00000188 "......_P" */ - 0x52,0x54,0x00,0xA4,0x41,0x49,0x52,0x30, /* 00000190 "RT..AIR0" */ - 0x5B,0x82,0x42,0x2E,0x49,0x53,0x41,0x5F, /* 00000198 "[.B.ISA_" */ - 0x08,0x5F,0x41,0x44,0x52,0x0C,0x00,0x00, /* 000001A0 "._ADR..." */ - 0x01,0x00,0x5B,0x82,0x46,0x0B,0x53,0x59, /* 000001A8 "..[.F.SY" */ - 0x53,0x52,0x08,0x5F,0x48,0x49,0x44,0x0C, /* 000001B0 "SR._HID." */ - 0x41,0xD0,0x0C,0x02,0x08,0x5F,0x55,0x49, /* 000001B8 "A...._UI" */ - 0x44,0x01,0x08,0x43,0x52,0x53,0x5F,0x11, /* 000001C0 "D..CRS_." */ - 0x4E,0x08,0x0A,0x8A,0x47,0x01,0x10,0x00, /* 000001C8 "N...G..." */ - 0x10,0x00,0x00,0x10,0x47,0x01,0x22,0x00, /* 000001D0 "....G."." */ - 0x22,0x00,0x00,0x0C,0x47,0x01,0x30,0x00, /* 000001D8 ""...G.0." */ - 0x30,0x00,0x00,0x10,0x47,0x01,0x44,0x00, /* 000001E0 "0...G.D." */ - 0x44,0x00,0x00,0x1C,0x47,0x01,0x62,0x00, /* 000001E8 "D...G.b." */ - 0x62,0x00,0x00,0x02,0x47,0x01,0x65,0x00, /* 000001F0 "b...G.e." */ - 0x65,0x00,0x00,0x0B,0x47,0x01,0x72,0x00, /* 000001F8 "e...G.r." */ - 0x72,0x00,0x00,0x0E,0x47,0x01,0x80,0x00, /* 00000200 "r...G..." */ - 0x80,0x00,0x00,0x01,0x47,0x01,0x84,0x00, /* 00000208 "....G..." */ - 0x84,0x00,0x00,0x03,0x47,0x01,0x88,0x00, /* 00000210 "....G..." */ - 0x88,0x00,0x00,0x01,0x47,0x01,0x8C,0x00, /* 00000218 "....G..." */ - 0x8C,0x00,0x00,0x03,0x47,0x01,0x90,0x00, /* 00000220 "....G..." */ - 0x90,0x00,0x00,0x10,0x47,0x01,0xA2,0x00, /* 00000228 "....G..." */ - 0xA2,0x00,0x00,0x1C,0x47,0x01,0xE0,0x00, /* 00000230 "....G..." */ - 0xE0,0x00,0x00,0x10,0x47,0x01,0xA0,0x08, /* 00000238 "....G..." */ - 0xA0,0x08,0x00,0x04,0x47,0x01,0xC0,0x0C, /* 00000240 "....G..." */ - 0xC0,0x0C,0x00,0x10,0x47,0x01,0xD0,0x04, /* 00000248 "....G..." */ - 0xD0,0x04,0x00,0x02,0x79,0x00,0x14,0x0B, /* 00000250 "....y..." */ - 0x5F,0x43,0x52,0x53,0x00,0xA4,0x43,0x52, /* 00000258 "_CRS..CR" */ - 0x53,0x5F,0x5B,0x82,0x2B,0x50,0x49,0x43, /* 00000260 "S_[.+PIC" */ - 0x5F,0x08,0x5F,0x48,0x49,0x44,0x0B,0x41, /* 00000268 "_._HID.A" */ - 0xD0,0x08,0x5F,0x43,0x52,0x53,0x11,0x18, /* 00000270 ".._CRS.." */ - 0x0A,0x15,0x47,0x01,0x20,0x00,0x20,0x00, /* 00000278 "..G. . ." */ - 0x01,0x02,0x47,0x01,0xA0,0x00,0xA0,0x00, /* 00000280 "..G....." */ - 0x01,0x02,0x22,0x04,0x00,0x79,0x00,0x5B, /* 00000288 ".."..y.[" */ - 0x82,0x47,0x05,0x44,0x4D,0x41,0x30,0x08, /* 00000290 ".G.DMA0." */ - 0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,0x02, /* 00000298 "_HID.A.." */ - 0x00,0x08,0x5F,0x43,0x52,0x53,0x11,0x41, /* 000002A0 ".._CRS.A" */ - 0x04,0x0A,0x3D,0x2A,0x10,0x04,0x47,0x01, /* 000002A8 "..=*..G." */ - 0x00,0x00,0x00,0x00,0x00,0x10,0x47,0x01, /* 000002B0 "......G." */ - 0x81,0x00,0x81,0x00,0x00,0x03,0x47,0x01, /* 000002B8 "......G." */ - 0x87,0x00,0x87,0x00,0x00,0x01,0x47,0x01, /* 000002C0 "......G." */ - 0x89,0x00,0x89,0x00,0x00,0x03,0x47,0x01, /* 000002C8 "......G." */ - 0x8F,0x00,0x8F,0x00,0x00,0x01,0x47,0x01, /* 000002D0 "......G." */ - 0xC0,0x00,0xC0,0x00,0x00,0x20,0x47,0x01, /* 000002D8 "..... G." */ - 0x80,0x04,0x80,0x04,0x00,0x10,0x79,0x00, /* 000002E0 "......y." */ - 0x5B,0x82,0x25,0x54,0x4D,0x52,0x5F,0x08, /* 000002E8 "[.%TMR_." */ - 0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,0x01, /* 000002F0 "_HID.A.." */ - 0x00,0x08,0x5F,0x43,0x52,0x53,0x11,0x10, /* 000002F8 ".._CRS.." */ - 0x0A,0x0D,0x47,0x01,0x40,0x00,0x40,0x00, /* 00000300 "..G.@.@." */ - 0x00,0x04,0x22,0x01,0x00,0x79,0x00,0x5B, /* 00000308 ".."..y.[" */ - 0x82,0x25,0x52,0x54,0x43,0x5F,0x08,0x5F, /* 00000310 ".%RTC_._" */ - 0x48,0x49,0x44,0x0C,0x41,0xD0,0x0B,0x00, /* 00000318 "HID.A..." */ - 0x08,0x5F,0x43,0x52,0x53,0x11,0x10,0x0A, /* 00000320 "._CRS..." */ - 0x0D,0x47,0x01,0x70,0x00,0x70,0x00,0x00, /* 00000328 ".G.p.p.." */ - 0x02,0x22,0x00,0x01,0x79,0x00,0x5B,0x82, /* 00000330 "."..y.[." */ - 0x22,0x53,0x50,0x4B,0x52,0x08,0x5F,0x48, /* 00000338 ""SPKR._H" */ - 0x49,0x44,0x0C,0x41,0xD0,0x08,0x00,0x08, /* 00000340 "ID.A...." */ - 0x5F,0x43,0x52,0x53,0x11,0x0D,0x0A,0x0A, /* 00000348 "_CRS...." */ - 0x47,0x01,0x61,0x00,0x61,0x00,0x00,0x01, /* 00000350 "G.a.a..." */ - 0x79,0x00,0x5B,0x82,0x31,0x50,0x53,0x32, /* 00000358 "y.[.1PS2" */ - 0x4D,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41, /* 00000360 "M._HID.A" */ - 0xD0,0x0F,0x13,0x08,0x5F,0x43,0x49,0x44, /* 00000368 "...._CID" */ - 0x0C,0x41,0xD0,0x0F,0x13,0x14,0x09,0x5F, /* 00000370 ".A....._" */ - 0x53,0x54,0x41,0x00,0xA4,0x0A,0x0F,0x08, /* 00000378 "STA....." */ - 0x5F,0x43,0x52,0x53,0x11,0x08,0x0A,0x05, /* 00000380 "_CRS...." */ - 0x22,0x00,0x10,0x79,0x00,0x5B,0x82,0x42, /* 00000388 ""..y.[.B" */ - 0x04,0x50,0x53,0x32,0x4B,0x08,0x5F,0x48, /* 00000390 ".PS2K._H" */ - 0x49,0x44,0x0C,0x41,0xD0,0x03,0x03,0x08, /* 00000398 "ID.A...." */ - 0x5F,0x43,0x49,0x44,0x0C,0x41,0xD0,0x03, /* 000003A0 "_CID.A.." */ - 0x0B,0x14,0x09,0x5F,0x53,0x54,0x41,0x00, /* 000003A8 "..._STA." */ - 0xA4,0x0A,0x0F,0x08,0x5F,0x43,0x52,0x53, /* 000003B0 "...._CRS" */ - 0x11,0x18,0x0A,0x15,0x47,0x01,0x60,0x00, /* 000003B8 "....G.`." */ - 0x60,0x00,0x00,0x01,0x47,0x01,0x64,0x00, /* 000003C0 "`...G.d." */ - 0x64,0x00,0x00,0x01,0x22,0x02,0x00,0x79, /* 000003C8 "d..."..y" */ - 0x00,0x5B,0x82,0x3A,0x46,0x44,0x43,0x30, /* 000003D0 ".[.:FDC0" */ - 0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0, /* 000003D8 "._HID.A." */ - 0x07,0x00,0x14,0x09,0x5F,0x53,0x54,0x41, /* 000003E0 "...._STA" */ - 0x00,0xA4,0x0A,0x0F,0x08,0x5F,0x43,0x52, /* 000003E8 "....._CR" */ - 0x53,0x11,0x1B,0x0A,0x18,0x47,0x01,0xF0, /* 000003F0 "S....G.." */ - 0x03,0xF0,0x03,0x01,0x06,0x47,0x01,0xF7, /* 000003F8 ".....G.." */ - 0x03,0xF7,0x03,0x01,0x01,0x22,0x40,0x00, /* 00000400 "....."@." */ - 0x2A,0x04,0x00,0x79,0x00,0x5B,0x82,0x35, /* 00000408 "*..y.[.5" */ - 0x55,0x41,0x52,0x31,0x08,0x5F,0x48,0x49, /* 00000410 "UAR1._HI" */ - 0x44,0x0C,0x41,0xD0,0x05,0x01,0x08,0x5F, /* 00000418 "D.A...._" */ - 0x55,0x49,0x44,0x01,0x14,0x09,0x5F,0x53, /* 00000420 "UID..._S" */ - 0x54,0x41,0x00,0xA4,0x0A,0x0F,0x08,0x5F, /* 00000428 "TA....._" */ - 0x43,0x52,0x53,0x11,0x10,0x0A,0x0D,0x47, /* 00000430 "CRS....G" */ - 0x01,0xF8,0x03,0xF8,0x03,0x01,0x08,0x22, /* 00000438 "......."" */ - 0x10,0x00,0x79,0x00,0x5B,0x82,0x36,0x55, /* 00000440 "..y.[.6U" */ - 0x41,0x52,0x32,0x08,0x5F,0x48,0x49,0x44, /* 00000448 "AR2._HID" */ - 0x0C,0x41,0xD0,0x05,0x01,0x08,0x5F,0x55, /* 00000450 ".A...._U" */ - 0x49,0x44,0x0A,0x02,0x14,0x09,0x5F,0x53, /* 00000458 "ID...._S" */ - 0x54,0x41,0x00,0xA4,0x0A,0x0F,0x08,0x5F, /* 00000460 "TA....._" */ - 0x43,0x52,0x53,0x11,0x10,0x0A,0x0D,0x47, /* 00000468 "CRS....G" */ - 0x01,0xF8,0x02,0xF8,0x02,0x01,0x08,0x22, /* 00000470 "......."" */ - 0x08,0x00,0x79,0x00, + 0x00,0x00,0x00,0x10,0x4D,0x41,0x5F,0x53, /* 00000090 "....MA_S" */ + 0x42,0x5F,0x5B,0x82,0x45,0x41,0x50,0x43, /* 00000098 "B_[.EAPC" */ + 0x49,0x30,0x08,0x5F,0x48,0x49,0x44,0x0C, /* 000000A0 "I0._HID." */ + 0x41,0xD0,0x0A,0x03,0x08,0x5F,0x55,0x49, /* 000000A8 "A...._UI" */ + 0x44,0x00,0x08,0x5F,0x41,0x44,0x52,0x00, /* 000000B0 "D.._ADR." */ + 0x08,0x5F,0x42,0x42,0x4E,0x00,0x14,0x48, /* 000000B8 "._BBN..H" */ + 0x0D,0x5F,0x43,0x52,0x53,0x00,0x08,0x50, /* 000000C0 "._CRS..P" */ + 0x52,0x54,0x30,0x11,0x46,0x0C,0x0A,0xC2, /* 000000C8 "RT0.F..." */ + 0x88,0x0D,0x00,0x02,0x0F,0x00,0x00,0x00, /* 000000D0 "........" */ + 0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x01, /* 000000D8 "........" */ + 0x47,0x01,0xF8,0x0C,0xF8,0x0C,0x01,0x08, /* 000000E0 "G......." */ + 0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,0x00, /* 000000E8 "........" */ + 0x00,0x00,0xF7,0x0C,0x00,0x00,0xF8,0x0C, /* 000000F0 "........" */ + 0x88,0x0D,0x00,0x01,0x0C,0x03,0x00,0x00, /* 000000F8 "........" */ + 0x00,0x0D,0xFF,0x0F,0x00,0x00,0x00,0x03, /* 00000100 "........" */ + 0x88,0x0D,0x00,0x01,0x0D,0x03,0x00,0x00, /* 00000108 "........" */ + 0x00,0xC0,0x1F,0xC0,0x00,0x00,0x20,0x00, /* 00000110 "...... ." */ + 0x88,0x0D,0x00,0x01,0x0D,0x03,0x00,0x00, /* 00000118 "........" */ + 0x20,0xC0,0x3F,0xC0,0x00,0x00,0x10,0x00, /* 00000120 " .?....." */ + 0x87,0x17,0x00,0x00,0x0C,0x02,0x00,0x00, /* 00000128 "........" */ + 0x00,0x00,0x00,0x00,0x0C,0x00,0xFF,0xFF, /* 00000130 "........" */ + 0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000138 "........" */ + 0x03,0x00,0x87,0x17,0x00,0x00,0x0D,0x03, /* 00000140 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF0, /* 00000148 "........" */ + 0xFF,0xFF,0xFF,0xF1,0x00,0x00,0x00,0x00, /* 00000150 "........" */ + 0x00,0x00,0x00,0x02,0x87,0x17,0x00,0x00, /* 00000158 "........" */ + 0x0D,0x03,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000160 "........" */ + 0x00,0xF2,0xFF,0x0F,0x00,0xF2,0x00,0x00, /* 00000168 "........" */ + 0x00,0x00,0x00,0x10,0x00,0x00,0x87,0x17, /* 00000170 "........" */ + 0x00,0x00,0x0D,0x03,0x00,0x00,0x00,0x00, /* 00000178 "........" */ + 0x00,0x10,0x00,0xF2,0x1F,0x10,0x00,0xF2, /* 00000180 "........" */ + 0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x00, /* 00000188 ".... ..." */ + 0x79,0x00,0xA4,0x50,0x52,0x54,0x30,0x5B, /* 00000190 "y..PRT0[" */ + 0x82,0x48,0x31,0x49,0x53,0x41,0x5F,0x08, /* 00000198 ".H1ISA_." */ + 0x5F,0x41,0x44,0x52,0x00,0x5B,0x80,0x50, /* 000001A0 "_ADR.[.P" */ + 0x49,0x52,0x51,0x02,0x0A,0x60,0x0A,0x04, /* 000001A8 "IRQ..`.." */ + 0x10,0x2E,0x5C,0x00,0x5B,0x81,0x29,0x5C, /* 000001B0 "..\.[.)\" */ + 0x2F,0x04,0x5F,0x53,0x42,0x5F,0x50,0x43, /* 000001B8 "/._SB_PC" */ + 0x49,0x30,0x49,0x53,0x41,0x5F,0x50,0x49, /* 000001C0 "I0ISA_PI" */ + 0x52,0x51,0x01,0x50,0x49,0x52,0x41,0x08, /* 000001C8 "RQ.PIRA." */ + 0x50,0x49,0x52,0x42,0x08,0x50,0x49,0x52, /* 000001D0 "PIRB.PIR" */ + 0x43,0x08,0x50,0x49,0x52,0x44,0x08,0x5B, /* 000001D8 "C.PIRD.[" */ + 0x82,0x46,0x0B,0x53,0x59,0x53,0x52,0x08, /* 000001E0 ".F.SYSR." */ + 0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,0x0C, /* 000001E8 "_HID.A.." */ + 0x02,0x08,0x5F,0x55,0x49,0x44,0x01,0x08, /* 000001F0 ".._UID.." */ + 0x43,0x52,0x53,0x5F,0x11,0x4E,0x08,0x0A, /* 000001F8 "CRS_.N.." */ + 0x8A,0x47,0x01,0x10,0x00,0x10,0x00,0x00, /* 00000200 ".G......" */ + 0x10,0x47,0x01,0x22,0x00,0x22,0x00,0x00, /* 00000208 ".G.".".." */ + 0x0C,0x47,0x01,0x30,0x00,0x30,0x00,0x00, /* 00000210 ".G.0.0.." */ + 0x10,0x47,0x01,0x44,0x00,0x44,0x00,0x00, /* 00000218 ".G.D.D.." */ + 0x1C,0x47,0x01,0x62,0x00,0x62,0x00,0x00, /* 00000220 ".G.b.b.." */ + 0x02,0x47,0x01,0x65,0x00,0x65,0x00,0x00, /* 00000228 ".G.e.e.." */ + 0x0B,0x47,0x01,0x72,0x00,0x72,0x00,0x00, /* 00000230 ".G.r.r.." */ + 0x0E,0x47,0x01,0x80,0x00,0x80,0x00,0x00, /* 00000238 ".G......" */ + 0x01,0x47,0x01,0x84,0x00,0x84,0x00,0x00, /* 00000240 ".G......" */ + 0x03,0x47,0x01,0x88,0x00,0x88,0x00,0x00, /* 00000248 ".G......" */ + 0x01,0x47,0x01,0x8C,0x00,0x8C,0x00,0x00, /* 00000250 ".G......" */ + 0x03,0x47,0x01,0x90,0x00,0x90,0x00,0x00, /* 00000258 ".G......" */ + 0x10,0x47,0x01,0xA2,0x00,0xA2,0x00,0x00, /* 00000260 ".G......" */ + 0x1C,0x47,0x01,0xE0,0x00,0xE0,0x00,0x00, /* 00000268 ".G......" */ + 0x10,0x47,0x01,0xA0,0x08,0xA0,0x08,0x00, /* 00000270 ".G......" */ + 0x04,0x47,0x01,0xC0,0x0C,0xC0,0x0C,0x00, /* 00000278 ".G......" */ + 0x10,0x47,0x01,0xD0,0x04,0xD0,0x04,0x00, /* 00000280 ".G......" */ + 0x02,0x79,0x00,0x14,0x0B,0x5F,0x43,0x52, /* 00000288 ".y..._CR" */ + 0x53,0x00,0xA4,0x43,0x52,0x53,0x5F,0x5B, /* 00000290 "S..CRS_[" */ + 0x82,0x2B,0x50,0x49,0x43,0x5F,0x08,0x5F, /* 00000298 ".+PIC_._" */ + 0x48,0x49,0x44,0x0B,0x41,0xD0,0x08,0x5F, /* 000002A0 "HID.A.._" */ + 0x43,0x52,0x53,0x11,0x18,0x0A,0x15,0x47, /* 000002A8 "CRS....G" */ + 0x01,0x20,0x00,0x20,0x00,0x01,0x02,0x47, /* 000002B0 ". . ...G" */ + 0x01,0xA0,0x00,0xA0,0x00,0x01,0x02,0x22, /* 000002B8 "......."" */ + 0x04,0x00,0x79,0x00,0x5B,0x82,0x47,0x05, /* 000002C0 "..y.[.G." */ + 0x44,0x4D,0x41,0x30,0x08,0x5F,0x48,0x49, /* 000002C8 "DMA0._HI" */ + 0x44,0x0C,0x41,0xD0,0x02,0x00,0x08,0x5F, /* 000002D0 "D.A...._" */ + 0x43,0x52,0x53,0x11,0x41,0x04,0x0A,0x3D, /* 000002D8 "CRS.A..=" */ + 0x2A,0x10,0x04,0x47,0x01,0x00,0x00,0x00, /* 000002E0 "*..G...." */ + 0x00,0x00,0x10,0x47,0x01,0x81,0x00,0x81, /* 000002E8 "...G...." */ + 0x00,0x00,0x03,0x47,0x01,0x87,0x00,0x87, /* 000002F0 "...G...." */ + 0x00,0x00,0x01,0x47,0x01,0x89,0x00,0x89, /* 000002F8 "...G...." */ + 0x00,0x00,0x03,0x47,0x01,0x8F,0x00,0x8F, /* 00000300 "...G...." */ + 0x00,0x00,0x01,0x47,0x01,0xC0,0x00,0xC0, /* 00000308 "...G...." */ + 0x00,0x00,0x20,0x47,0x01,0x80,0x04,0x80, /* 00000310 ".. G...." */ + 0x04,0x00,0x10,0x79,0x00,0x5B,0x82,0x25, /* 00000318 "...y.[.%" */ + 0x54,0x4D,0x52,0x5F,0x08,0x5F,0x48,0x49, /* 00000320 "TMR_._HI" */ + 0x44,0x0C,0x41,0xD0,0x01,0x00,0x08,0x5F, /* 00000328 "D.A...._" */ + 0x43,0x52,0x53,0x11,0x10,0x0A,0x0D,0x47, /* 00000330 "CRS....G" */ + 0x01,0x40,0x00,0x40,0x00,0x00,0x04,0x22, /* 00000338 ".@.@..."" */ + 0x01,0x00,0x79,0x00,0x5B,0x82,0x25,0x52, /* 00000340 "..y.[.%R" */ + 0x54,0x43,0x5F,0x08,0x5F,0x48,0x49,0x44, /* 00000348 "TC_._HID" */ + 0x0C,0x41,0xD0,0x0B,0x00,0x08,0x5F,0x43, /* 00000350 ".A...._C" */ + 0x52,0x53,0x11,0x10,0x0A,0x0D,0x47,0x01, /* 00000358 "RS....G." */ + 0x70,0x00,0x70,0x00,0x00,0x02,0x22,0x00, /* 00000360 "p.p..."." */ + 0x01,0x79,0x00,0x5B,0x82,0x22,0x53,0x50, /* 00000368 ".y.[."SP" */ + 0x4B,0x52,0x08,0x5F,0x48,0x49,0x44,0x0C, /* 00000370 "KR._HID." */ + 0x41,0xD0,0x08,0x00,0x08,0x5F,0x43,0x52, /* 00000378 "A...._CR" */ + 0x53,0x11,0x0D,0x0A,0x0A,0x47,0x01,0x61, /* 00000380 "S....G.a" */ + 0x00,0x61,0x00,0x00,0x01,0x79,0x00,0x5B, /* 00000388 ".a...y.[" */ + 0x82,0x31,0x50,0x53,0x32,0x4D,0x08,0x5F, /* 00000390 ".1PS2M._" */ + 0x48,0x49,0x44,0x0C,0x41,0xD0,0x0F,0x13, /* 00000398 "HID.A..." */ + 0x08,0x5F,0x43,0x49,0x44,0x0C,0x41,0xD0, /* 000003A0 "._CID.A." */ + 0x0F,0x13,0x14,0x09,0x5F,0x53,0x54,0x41, /* 000003A8 "...._STA" */ + 0x00,0xA4,0x0A,0x0F,0x08,0x5F,0x43,0x52, /* 000003B0 "....._CR" */ + 0x53,0x11,0x08,0x0A,0x05,0x22,0x00,0x10, /* 000003B8 "S....".." */ + 0x79,0x00,0x5B,0x82,0x42,0x04,0x50,0x53, /* 000003C0 "y.[.B.PS" */ + 0x32,0x4B,0x08,0x5F,0x48,0x49,0x44,0x0C, /* 000003C8 "2K._HID." */ + 0x41,0xD0,0x03,0x03,0x08,0x5F,0x43,0x49, /* 000003D0 "A...._CI" */ + 0x44,0x0C,0x41,0xD0,0x03,0x0B,0x14,0x09, /* 000003D8 "D.A....." */ + 0x5F,0x53,0x54,0x41,0x00,0xA4,0x0A,0x0F, /* 000003E0 "_STA...." */ + 0x08,0x5F,0x43,0x52,0x53,0x11,0x18,0x0A, /* 000003E8 "._CRS..." */ + 0x15,0x47,0x01,0x60,0x00,0x60,0x00,0x00, /* 000003F0 ".G.`.`.." */ + 0x01,0x47,0x01,0x64,0x00,0x64,0x00,0x00, /* 000003F8 ".G.d.d.." */ + 0x01,0x22,0x02,0x00,0x79,0x00,0x5B,0x82, /* 00000400 "."..y.[." */ + 0x3A,0x46,0x44,0x43,0x30,0x08,0x5F,0x48, /* 00000408 ":FDC0._H" */ + 0x49,0x44,0x0C,0x41,0xD0,0x07,0x00,0x14, /* 00000410 "ID.A...." */ + 0x09,0x5F,0x53,0x54,0x41,0x00,0xA4,0x0A, /* 00000418 "._STA..." */ + 0x0F,0x08,0x5F,0x43,0x52,0x53,0x11,0x1B, /* 00000420 ".._CRS.." */ + 0x0A,0x18,0x47,0x01,0xF0,0x03,0xF0,0x03, /* 00000428 "..G....." */ + 0x01,0x06,0x47,0x01,0xF7,0x03,0xF7,0x03, /* 00000430 "..G....." */ + 0x01,0x01,0x22,0x40,0x00,0x2A,0x04,0x00, /* 00000438 ".."@.*.." */ + 0x79,0x00,0x5B,0x82,0x35,0x55,0x41,0x52, /* 00000440 "y.[.5UAR" */ + 0x31,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41, /* 00000448 "1._HID.A" */ + 0xD0,0x05,0x01,0x08,0x5F,0x55,0x49,0x44, /* 00000450 "...._UID" */ + 0x01,0x14,0x09,0x5F,0x53,0x54,0x41,0x00, /* 00000458 "..._STA." */ + 0xA4,0x0A,0x0F,0x08,0x5F,0x43,0x52,0x53, /* 00000460 "...._CRS" */ + 0x11,0x10,0x0A,0x0D,0x47,0x01,0xF8,0x03, /* 00000468 "....G..." */ + 0xF8,0x03,0x01,0x08,0x22,0x10,0x00,0x79, /* 00000470 "...."..y" */ + 0x00,0x5B,0x82,0x36,0x55,0x41,0x52,0x32, /* 00000478 ".[.6UAR2" */ + 0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0, /* 00000480 "._HID.A." */ + 0x05,0x01,0x08,0x5F,0x55,0x49,0x44,0x0A, /* 00000488 "..._UID." */ + 0x02,0x14,0x09,0x5F,0x53,0x54,0x41,0x00, /* 00000490 "..._STA." */ + 0xA4,0x0A,0x0F,0x08,0x5F,0x43,0x52,0x53, /* 00000498 "...._CRS" */ + 0x11,0x10,0x0A,0x0D,0x47,0x01,0xF8,0x02, /* 000004A0 "....G..." */ + 0xF8,0x02,0x01,0x08,0x22,0x08,0x00,0x79, /* 000004A8 "...."..y" */ + 0x00, }; int DsdtLen=sizeof(AmlCode); diff -r 34ff26fb2240 tools/firmware/acpi/acpi_fadt.h --- a/tools/firmware/acpi/acpi_fadt.h Mon Jun 12 12:01:32 2006 +0100 +++ b/tools/firmware/acpi/acpi_fadt.h Thu Jun 15 16:05:13 2006 -0700 @@ -22,19 +22,19 @@ // FADT Definitions, see ACPI 2.0 specification for details. // -#define ACPI_OEM_FADT_REVISION 0x00000000 // TBD +#define ACPI_OEM_FADT_REVISION 0x00000001 // TBD -#define ACPI_PREFERRED_PM_PROFILE 0x04 +#define ACPI_PREFERRED_PM_PROFILE 0x00 #define ACPI_SCI_INT 0x0009 -#define ACPI_SMI_CMD 0x000000B2 +#define ACPI_SMI_CMD 0x00000000 #define ACPI_ACPI_ENABLE 0x00 #define ACPI_ACPI_DISABLE 0x00 #define ACPI_S4_BIOS_REQ 0x00 #define ACPI_PSTATE_CNT 0x00 -#define ACPI_GPE1_BASE 0x20 +#define ACPI_GPE1_BASE 0x00 #define ACPI_CST_CNT 0x00 -#define ACPI_P_LVL2_LAT 0x0065 -#define ACPI_P_LVL3_LAT 0X03E9 +#define ACPI_P_LVL2_LAT 0x0064 +#define ACPI_P_LVL3_LAT 0X03E8 #define ACPI_FLUSH_SIZE 0x00 #define ACPI_FLUSH_STRIDE 0x00 #define ACPI_DUTY_OFFSET 0x01 @@ -51,15 +51,16 @@ // // Fixed Feature Flags // -#define ACPI_FIXED_FEATURE_FLAGS (ACPI_SLP_BUTTON| ACPI_WBINVD ) +#define ACPI_FIXED_FEATURE_FLAGS (ACPI_PROC_C1|ACPI_SLP_BUTTON|ACPI_WBINVD|ACPI_PWR_BUTTON|ACPI_FIX_RTC) // // PM1A Event Register Block Generic Address Information // #define ACPI_PM1A_EVT_BLK_ADDRESS_SPACE_ID ACPI_SYSTEM_IO -#define ACPI_PM1A_EVT_BLK_BIT_WIDTH 0x00 +#define ACPI_PM1A_EVT_BLK_BIT_WIDTH 0x20 #define ACPI_PM1A_EVT_BLK_BIT_OFFSET 0x00 -#define ACPI_PM1A_EVT_BLK_ADDRESS 0x0000000000008000 +//#define ACPI_PM1A_EVT_BLK_ADDRESS 0x000000000000c010 +#define ACPI_PM1A_EVT_BLK_ADDRESS 0x000000000000c040 // // PM1B Event Register Block Generic Address Information @@ -73,7 +74,7 @@ // PM1A Control Register Block Generic Address Information // #define ACPI_PM1A_CNT_BLK_ADDRESS_SPACE_ID ACPI_SYSTEM_IO -#define ACPI_PM1A_CNT_BLK_BIT_WIDTH 0x08 +#define ACPI_PM1A_CNT_BLK_BIT_WIDTH 0x10 #define ACPI_PM1A_CNT_BLK_BIT_OFFSET 0x00 #define ACPI_PM1A_CNT_BLK_ADDRESS (ACPI_PM1A_EVT_BLK_ADDRESS + 0x04) diff -r 34ff26fb2240 tools/ioemu/hw/pc.c --- a/tools/ioemu/hw/pc.c Mon Jun 12 12:01:32 2006 +0100 +++ b/tools/ioemu/hw/pc.c Thu Jun 15 16:05:13 2006 -0700 @@ -375,7 +375,9 @@ static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; -extern int acpi_init(unsigned int base); +//extern int acpi_init(unsigned int base); +/* PIIX4 acpi pci configuration space, func 3 */ +extern void pci_piix4_acpi_init(PCIBus *bus); #define NOBIOS 1 @@ -583,7 +585,9 @@ floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table); cmos_init(ram_size, boot_device, bs_table, timeoffset); - acpi_init(0x8000); +// using PIIX4 acpi model +// acpi_init(0x8000); + pci_piix4_acpi_init(pci_bus); if (pci_enabled && usb_enabled) { usb_uhci_init(pci_bus, usb_root_ports); diff -r 34ff26fb2240 tools/ioemu/hw/pci.c --- a/tools/ioemu/hw/pci.c Mon Jun 12 12:01:32 2006 +0100 +++ b/tools/ioemu/hw/pci.c Thu Jun 15 16:05:13 2006 -0700 @@ -1394,7 +1394,7 @@ static uint32_t pci_bios_io_addr; static uint32_t pci_bios_mem_addr; /* host irqs corresponding to PCI irqs A-D */ -static uint8_t pci_irqs[4] = { 11, 9, 11, 9 }; +static uint8_t pci_irqs[4] = { 10, 11, 10, 11 }; static void pci_set_io_region_addr(PCIDevice *d, int region_num, uint32_t addr) { @@ -1447,12 +1447,22 @@ pci_set_io_region_addr(d, 3, 0x374); } break; + case 0x0680: + if (vendor_id == 0x8086 && device_id == 0x7113) { + // PIIX4 ACPI PM + pci_config_writew(d, 0x20, 0x0000); // NO smb bus IO enable in PIIX4 + pci_config_writew(d, 0x22, 0x0000); + goto default_map; + } + break; + case 0x0300: if (vendor_id != 0x1234) goto default_map; /* VGA: map frame buffer to default Bochs VBE address */ pci_set_io_region_addr(d, 0, 0xE0000000); break; + case 0x0800: /* PIC */ vendor_id = pci_config_readw(d, PCI_VENDOR_ID); @@ -1497,6 +1507,13 @@ pic_irq = pci_irqs[pin]; pci_config_writeb(d, PCI_INTERRUPT_LINE, pic_irq); } + if (class== 0x0680&& vendor_id == 0x8086 && device_id == 0x7113) { + // PIIX4 ACPI PM + pci_config_writew(d, 0x20, 0x0000); // NO smb bus IO enable in PIIX4 + pci_config_writew(d, 0x22, 0x0000); + pci_config_writew(d, 0x3c, 0x0009); // Hardcodeed IRQ9 + pci_config_writew(d, 0x3d, 0x0001); + } } /* diff -r 34ff26fb2240 tools/ioemu/target-i386-dm/Makefile --- a/tools/ioemu/target-i386-dm/Makefile Mon Jun 12 12:01:32 2006 +0100 +++ b/tools/ioemu/target-i386-dm/Makefile Thu Jun 15 16:05:13 2006 -0700 @@ -281,7 +281,7 @@ # Hardware support VL_OBJS+= ide.o ne2000.o pckbd.o vga.o dma.o VL_OBJS+= fdc.o mc146818rtc.o serial.o i8259_stub.o pc.o port-e9.o -VL_OBJS+= cirrus_vga.o pcnet.o acpi.o +VL_OBJS+= cirrus_vga.o pcnet.o piix4acpi.o VL_OBJS+= $(SOUND_HW) $(AUDIODRV) mixeng.o ifeq ($(TARGET_ARCH), ppc) diff -r 34ff26fb2240 tools/ioemu/hw/piix4acpi.c --- /dev/null Thu Jan 1 00:00:00 1970 +0000 +++ b/tools/ioemu/hw/piix4acpi.c Thu Jun 15 16:05:13 2006 -0700 @@ -0,0 +1,389 @@ +/* + * PIIX4 ACPI controller emulation + * + * Winston liwen Wang, winston.l.wang@intel.com + * Copyright (c) 2006 , Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "vl.h" +#define FREQUENCE_PMTIMER 3753425 +/* acpi register bit define here */ + +/* PM1_STS */ +#define TMROF_STS (1 << 0) +#define BM_STS (1 << 4) +#define GBL_STS (1 << 5) +#define PWRBTN_STS (1 << 8) +#define RTC_STS (1 << 10) +#define PRBTNOR_STS (1 << 11) +#define WAK_STS (1 << 15) +/* PM1_EN */ +#define TMROF_EN (1 << 0) +#define GBL_EN (1 << 5) +#define PWRBTN_EN (1 << 8) +#define RTC_EN (1 << 10) +/* PM1_CNT */ +#define SCI_EN (1 << 0) +#define GBL_RLS (1 << 2) +#define SLP_EN (1 << 13) + +typedef struct AcpiDeviceState AcpiDeviceState; +AcpiDeviceState *acpi_device_table; + +/* Bits of PM1a register define here */ +typedef struct PM1Event_BLK { + uint16_t pm1_status; /* pm1a_EVT_BLK */ + uint16_t pm1_enable; /* pm1a_EVT_BLK+2 */ +}PM1Event_BLK; + +typedef struct PCIAcpiState { + PCIDevice dev; + uint16_t irq; + uint16_t pm1_status; /* pm1a_EVT_BLK */ + uint16_t pm1_enable; /* pm1a_EVT_BLK+2 */ + uint16_t pm1_control; /* pm1a_ECNT_BLK */ + uint32_t pm1_timer; /* pmtmr_BLK */ +} PCIAcpiState; + +static PCIAcpiState *acpi_state; + +static inline void acpi_set_irq(PCIAcpiState *s) +{ + +/* no real SCI event need for now, so comment the following line out */ +/* pic_set_irq(s->irq, 1); */ + printf("acpi_set_irq: s->irq %x \n",s->irq); +} + +static void acpi_reset(PCIAcpiState *s) +{ + uint8_t *pci_conf; + pci_conf = s->dev.config; + + pci_conf[0x42] = 0x00; + pci_conf[0x43] = 0x00; + s->irq = 9; + s->pm1_status = 0; + s->pm1_enable = 0x00; /*TMROF_EN should cleared */ + s->pm1_control = SCI_EN;/*SCI_EN */ + s->pm1_timer = 0; +} + +/*byte access */ +static void acpiPm1Status_writeb(void *opaque, uint32_t addr, uint32_t val) +{ + PCIAcpiState *s = opaque; + if ((val&TMROF_STS)==TMROF_STS) + s->pm1_status = s->pm1_status&!TMROF_STS; + + if ((val&GBL_STS)==GBL_STS) + s->pm1_status = s->pm1_status&!GBL_STS; + +/* printf("acpiPm1Status_writeb \n addr %x val:%x pm1_status:%x \n", addr, val,s->pm1_status); */ + +} + +static uint32_t acpiPm1Status_readb(void *opaque, uint32_t addr) +{ + PCIAcpiState *s = opaque; + uint32_t val; + + val = s->pm1_status; +/* printf("acpiPm1Status_readb \n addr %x val:%x\n", addr, val); */ + + return val; +} + +static void acpiPm1StatusP1_writeb(void *opaque, uint32_t addr, uint32_t val) +{ + PCIAcpiState *s = opaque; + + s->pm1_status = (val<<8)||(s->pm1_status); +/* printf("acpiPm1StatusP1_writeb \n addr %x val:%x\n", addr, val); */ + +} + +static uint32_t acpiPm1StatusP1_readb(void *opaque, uint32_t addr) +{ + PCIAcpiState *s = opaque; + uint32_t val; + + val = (s->pm1_status)>>8; + printf("acpiPm1StatusP1_readb \n addr %x val:%x\n", addr, val); + + return val; +} + +static void acpiPm1Enable_writeb(void *opaque, uint32_t addr, uint32_t val) +{ + PCIAcpiState *s = opaque; + + s->pm1_enable = val; +/* printf("acpiPm1Enable_writeb \n addr %x val:%x\n", addr, val); */ + +} + +static uint32_t acpiPm1Enable_readb(void *opaque, uint32_t addr) +{ + PCIAcpiState *s = opaque; + uint32_t val; + + val = (s->pm1_enable)||0x1; +/* printf("acpiPm1Enable_readb \n addr %x val:%x\n", addr, val); */ + + return val; +} + +static void acpiPm1EnableP1_writeb(void *opaque, uint32_t addr, uint32_t val) +{ + PCIAcpiState *s = opaque; + + s->pm1_enable = (val<<8)||(s->pm1_enable); +/* printf("acpiPm1EnableP1_writeb \n addr %x val:%x\n", addr, val); */ + +} + +static uint32_t acpiPm1EnableP1_readb(void *opaque, uint32_t addr) +{ + PCIAcpiState *s = opaque; + uint32_t val; + + val = (s->pm1_enable)>>8; +/* printf("acpiPm1EnableP1_readb \n addr %x val:%x\n", addr, val); */ + + return val; +} + +static void acpiPm1Control_writeb(void *opaque, uint32_t addr, uint32_t val) +{ + PCIAcpiState *s = opaque; + + s->pm1_control = val; +/* printf("acpiPm1Control_writeb \n addr %x val:%x\n", addr, val); */ + +} + +static uint32_t acpiPm1Control_readb(void *opaque, uint32_t addr) +{ + PCIAcpiState *s = opaque; + uint32_t val; + + val = s->pm1_control; +/* printf("acpiPm1Control_readb \n addr %x val:%x\n", addr, val); */ + + return val; +} + +static void acpiPm1ControlP1_writeb(void *opaque, uint32_t addr, uint32_t val) +{ + PCIAcpiState *s = opaque; + + s->pm1_control = (val<<8)||(s->pm1_control); +/* printf("acpiPm1ControlP1_writeb \n addr %x val:%x\n", addr, val); */ + +} + +static uint32_t acpiPm1ControlP1_readb(void *opaque, uint32_t addr) +{ + PCIAcpiState *s = opaque; + uint32_t val; + + val = (s->pm1_control)>>8; +/* printf("acpiPm1ControlP1_readb \n addr %x val:%x\n", addr, val); */ + + return val; +} + + +/* word access */ + +static void acpiPm1Status_writew(void *opaque, uint32_t addr, uint32_t val) +{ + PCIAcpiState *s = opaque; + if ((val&TMROF_STS)==TMROF_STS) + s->pm1_status = s->pm1_status&!TMROF_STS; + + if ((val&GBL_STS)==GBL_STS) + s->pm1_status = s->pm1_status&!GBL_STS; + +/* printf("acpiPm1Status_writew \n addr %x val:%x pm1_status:%x \n", addr, val,s->pm1_status); */ +} + +static uint32_t acpiPm1Status_readw(void *opaque, uint32_t addr) +{ + PCIAcpiState *s = opaque; + uint32_t val; + + val = s->pm1_status; +/* printf("acpiPm1Status_readw \n addr %x val:%x\n", addr, val); */ + + return val; +} + +static void acpiPm1Enable_writew(void *opaque, uint32_t addr, uint32_t val) +{ + PCIAcpiState *s = opaque; + + s->pm1_enable = val; +/* printf("acpiPm1Enable_writew \n addr %x val:%x\n", addr, val); */ + +} + +static uint32_t acpiPm1Enable_readw(void *opaque, uint32_t addr) +{ + PCIAcpiState *s = opaque; + uint32_t val; + + val = s->pm1_enable; +/* printf("acpiPm1Enable_readw \n addr %x val:%x\n", addr, val); */ + + return val; +} + +static void acpiPm1Control_writew(void *opaque, uint32_t addr, uint32_t val) +{ + PCIAcpiState *s = opaque; + + s->pm1_control = val; +/* printf("acpiPm1Control_writew \n addr %x val:%x\n", addr, val); */ + +} + +static uint32_t acpiPm1Control_readw(void *opaque, uint32_t addr) +{ + PCIAcpiState *s = opaque; + uint32_t val; + + val = s->pm1_control; +/* printf("acpiPm1Control_readw \n addr %x val:%x\n", addr, val); */ + + return val; +} + +/* dword access */ + +static void acpiPm1Event_writel(void *opaque, uint32_t addr, uint32_t val) +{ + PCIAcpiState *s = opaque; + + s->pm1_status = val; + s->pm1_enable = val>>16; +/* printf("acpiPm1Event_writel \n addr %x val:%x \n", addr, val); */ + +} + +static void acpiPm1Event_readl(void *opaque, uint32_t addr) +{ + PCIAcpiState *s = opaque; + uint32_t val; + + val=s->pm1_status|(s->pm1_enable<<16); +/* printf("acpiPm1Event_readl \n addr %x val:%x\n", addr, val); */ +} + +static void acpiPm1Timer_writel(void *opaque, uint32_t addr, uint32_t val) +{ + PCIAcpiState *s = opaque; + + s->pm1_timer = val; +/* printf("acpiPm1Timer_writel \n addr %x val:%x\n", addr, val); */ + +} + +static uint32_t acpiPm1Timer_readl(void *opaque, uint32_t addr) +{ + PCIAcpiState *s = opaque; + uint32_t val; + + val = s->pm1_timer; +/* printf("acpiPm1Timer_readl \n addr %x val:%x\n", addr, val); */ + return val; +} + +static void acpi_map(PCIDevice *pci_dev, int region_num, + uint32_t addr, uint32_t size, int type) +{ + PCIAcpiState *d = (PCIAcpiState *)pci_dev; + printf("register acpi io \n "); + /*Byte access */ + register_ioport_write(addr, 1, 1, acpiPm1Status_writeb, d); + register_ioport_read(addr, 1, 1, acpiPm1Status_readb, d); + register_ioport_write(addr+1, 1, 1, acpiPm1StatusP1_writeb, d); + register_ioport_read(addr+1, 1, 1, acpiPm1StatusP1_readb, d); + + register_ioport_write(addr + 2, 1, 1, acpiPm1Enable_writeb, d); + register_ioport_read(addr + 2, 1, 1, acpiPm1Enable_readb, d); + register_ioport_write(addr + 2 +1, 1, 1, acpiPm1EnableP1_writeb, d); + register_ioport_read(addr + 2 +1, 1, 1, acpiPm1EnableP1_readb, d); + + register_ioport_write(addr + 4, 1, 1, acpiPm1Control_writeb, d); + register_ioport_read(addr + 4, 1, 1, acpiPm1Control_readb, d); + register_ioport_write(addr + 4 + 1, 1, 1, acpiPm1ControlP1_writeb, d); + register_ioport_read(addr + 4 +1, 1, 1, acpiPm1ControlP1_readb, d); + + /* word access */ + register_ioport_write(addr, 2, 2, acpiPm1Status_writew, d); + register_ioport_read(addr, 2, 2, acpiPm1Status_readw, d); + + register_ioport_write(addr + 2, 2, 2, acpiPm1Enable_writew, d); + register_ioport_read(addr + 2, 2, 2, acpiPm1Enable_readw, d); + + register_ioport_write(addr + 4, 2, 2, acpiPm1Control_writew, d); + register_ioport_read(addr + 4, 2, 2, acpiPm1Control_readw, d); + + /* dword access */ + register_ioport_write(addr, 4, 4, acpiPm1Event_writel, d); + register_ioport_read(addr, 4, 4, acpiPm1Event_readl, d); + + register_ioport_write(addr + 8, 4, 4, acpiPm1Timer_writel, d); + register_ioport_read(addr + 8, 4, 4, acpiPm1Timer_readl, d); +} + + +/* PIIX4 acpi pci configuration space, func 3 */ +void pci_piix4_acpi_init(PCIBus *bus) +{ + PCIAcpiState *d;//,*s; + uint8_t *pci_conf;//,*pci_conf_usb; + + /* register a function 3 of PIIX4 */ + d = (PCIAcpiState *)pci_register_device(bus, "PIIX4 ACPI", + sizeof(PCIAcpiState), + ((PCIDevice *)piix3_state)->devfn + 3, + NULL, NULL); + acpi_state = d; + pci_conf = d->dev.config; + pci_conf[0x00] = 0x86; // Intel + pci_conf[0x01] = 0x80; + pci_conf[0x02] = 0x13; + pci_conf[0x03] = 0x71; + pci_conf[0x08] = 0x01; //B0 stepping + pci_conf[0x09] = 0x00; //base class + pci_conf[0x0a] = 0x80; //Sub class + pci_conf[0x0b] = 0x06; + pci_conf[0x0e] = 0x00; + pci_conf[0x3d] = 0x01; // Hardwired to PIRQA is used + + pci_register_io_region((PCIDevice *)d, 4, 0x10, + PCI_ADDRESS_SPACE_IO, acpi_map); + + acpi_reset (d); + +}