--- original/xen-unstable.hg/xen/include/asm-x86/apicdef.h	2005-07-15 17:08:24.000000000 -0400
+++ xen-unstable.hg/xen/include/asm-x86/apicdef.h	2005-07-18 11:41:18.784872696 -0400
@@ -111,7 +111,11 @@
 #ifdef CONFIG_NUMA
  #define MAX_IO_APICS 32
 #else
- #define MAX_IO_APICS 8
+ #if defined (__i386__)
+  #define MAX_IO_APICS 65
+ #elif defined (__x86_64__)
+  #define MAX_IO_APICS 129
+ #endif
 #endif
 
 /*
--- original/xen-unstable.hg/xen/arch/x86/genapic/es7000plat.c	2005-07-15 17:08:24.000000000 -0400
+++ xen-unstable.hg/xen/arch/x86/genapic/es7000plat.c	2005-07-18 11:41:18.785872544 -0400
@@ -136,7 +136,19 @@ parse_unisys_oem (char *oemptr, int oem_
 		es7000_plat = 0;
 	} else {
 		printk("\nEnabling ES7000 specific features...\n");
-		es7000_plat = 1;
+		/*
+		 * Determine the generation of the ES7000 currently running.
+		 *
+		 * es7000_plat = 0 if the machine is NOT a Unisys ES7000 box
+		 * es7000_plat = 1 if the machine is a 5xx ES7000 box
+		 * es7000_plat = 2 if the machine is a x86_64 ES7000 box
+		 *
+		 */
+		if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
+			es7000_plat = 2;
+		else
+			es7000_plat = 1;
+
 		ioapic_renumber_irq = es7000_rename_gsi;
 	}
 	return es7000_plat;
@@ -286,7 +298,7 @@ es7000_stop_cpu(int cpu)
 void __init
 es7000_sw_apic()
 {
-	if (es7000_plat) {
+	if (es7000_plat == 1) {
 		int mip_status;
 		struct mip_reg es7000_mip_reg;
 
--- original/xen-unstable.hg/xen/arch/x86/io_apic.c	2005-07-15 17:08:24.000000000 -0400
+++ xen-unstable.hg/xen/arch/x86/io_apic.c	2005-07-18 11:41:18.786872392 -0400
@@ -954,6 +954,13 @@ static void __init setup_ioapic_ids_from
     int i;
     unsigned char old_id;
     unsigned long flags;
+    
+    /*
+     * Don't check I/O APIC IDs for xAPIC systems. They have
+     * no meaning without the serial APIC bus.
+     */
+    if (!(boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && boot_cpu_data.x86 < 15))
+         return;
 
     /*
      * This is broken; anything with a real cpu count has to
--- original/xen-unstable.hg/xen/arch/x86/mpparse.c	2005-07-15 17:08:24.000000000 -0400
+++ xen-unstable.hg/xen/arch/x86/mpparse.c	2005-07-18 11:41:18.787872240 -0400
@@ -913,7 +913,12 @@ void __init mp_register_ioapic (
 	mp_ioapics[idx].mpc_apicaddr = address;
 
 	set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
-	mp_ioapics[idx].mpc_apicid = io_apic_get_unique_id(idx, id);
+
+	if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && (boot_cpu_data.x86 < 15))
+		mp_ioapics[idx].mpc_apicid = io_apic_get_unique_id(idx, id);
+	else
+		mp_ioapics[idx].mpc_apicid = id;
+
 	mp_ioapics[idx].mpc_apicver = io_apic_get_version(idx);
 	
 	/* 
@@ -995,9 +1000,9 @@ void __init mp_config_acpi_legacy_irqs (
 	Dprintk("Bus #%d is ISA\n", MP_ISA_BUS);
 
 	/*
-	 * ES7000 has no legacy identity mappings
+	 * Older generations of ES7000 have no legacy identity mappings
 	 */
-	if (es7000_plat)
+	if (es7000_plat == 1)
 		return;
 
 	/* 
@@ -1053,11 +1058,20 @@ void __init mp_config_acpi_legacy_irqs (
 	}
 }
 
+#define MAX_GSI_NUM	4096
+
 int mp_register_gsi (u32 gsi, int edge_level, int active_high_low)
 {
 	int			ioapic = -1;
 	int			ioapic_pin = 0;
 	int			idx, bit = 0;
+	static int		pci_irq = 16;
+	/*
+	 * Mapping between Global System Interrups, which
+	 * represent all possible interrupts, and IRQs
+	 * assigned to actual devices.
+	*/
+	static int              gsi_to_irq[MAX_GSI_NUM];
 
 #ifdef CONFIG_ACPI_BUS
 	/* Don't set up the ACPI SCI because it's already set up */
@@ -1092,11 +1106,26 @@ int mp_register_gsi (u32 gsi, int edge_l
 	if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
 		Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
 			mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
-		return gsi;
+		return gsi_to_irq[gsi];
 	}
 
 	mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
 
+        if (edge_level) {
+                /*
+                 * For PCI devices assign IRQs in order, avoiding gaps
+                 * due to unused I/O APIC pins.
+                 */
+                int irq = gsi;
+                if (gsi < MAX_GSI_NUM) {
+                        gsi = pci_irq++;
+                        gsi_to_irq[irq] = gsi;
+                } else {
+                        printk(KERN_ERR "GSI %u is too high\n", gsi);
+                        return gsi;
+                }
+        }
+
 	io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
 		    edge_level == ACPI_EDGE_SENSITIVE ? 0 : 1,
 		    active_high_low == ACPI_ACTIVE_HIGH ? 0 : 1);