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Re: [Xen-merge] [PATCH] loosen write_cr0/4 restrictions

To: "Chris Wright" <chrisw@xxxxxxxxxxxx>
Subject: Re: [Xen-merge] [PATCH] loosen write_cr0/4 restrictions
From: "Jan Beulich" <JBeulich@xxxxxxxxxx>
Date: Thu, 12 Jan 2006 08:55:20 +0100
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I disagree with this change; it should rather be done similarly to the merge 
for x86-64's xor.h. I wonder why there was
no Xen-specific version of that file in the first place for i386, while there 
was one for x86-64 (which is why I didn't
notice the need to change anything there)... Jan

>>> Chris Wright <chrisw@xxxxxxxxxxxx> 12.01.06 00:54:34 >>>
This reverts BUG() to WARN_ON() plus actual write which will be trapped
and emulated.  I actually think the emulation is fine, since the
read/write pairs in XMMS_SAVE/RESTORE can't see TS, and there's proper
clts() call.  This allows my machine to boot rather than BUG() during
raid5 checksum tests:

  kernel BUG at include2/asm/xor.h:633!
  invalid opcode: 0000 [#1]
  SMP
  Modules linked in:
  CPU:    0
  EIP:    0061:[<c030be81>]    Not tainted VLI
  EFLAGS: 00010246   (2.6.15)
  EIP is at xor_sse_2+0x1ff/0x20d

Signed-off-by: Chris Wright <chrisw@xxxxxxxxxxxx>

--- a/include/asm-i386/mach-xen/mach_system.h   Mon Jan  9 19:28:35 2006
+++ b/include/asm-i386/mach-xen/mach_system.h   Wed Jan 11 14:24:55 2006
@@ -12,7 +12,9 @@
                :"=r" (__dummy)); \
        __dummy; \
 })
-#define write_cr0(x) BUG()
+#define write_cr0(x) \
+       WARN_ON(1); \
+       __asm__ __volatile__("movl %0,%%cr0": :"r" (x));
 
 #define read_cr2() ({ \
        unsigned int __dummy; \
@@ -38,8 +40,9 @@
                :"=r" (__dummy)); \
        __dummy; \
 })
-#define write_cr4(x) BUG()
-
+#define write_cr4(x) \
+       WARN_ON(1); \
+       __asm__ __volatile__("movl %0,%%cr4": :"r" (x));
 /*
  * Clear and set 'TS' bit respectively
  */

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