# HG changeset patch
# User yamahata@xxxxxxxxxxxxx
# Date 1195631489 -32400
# Node ID ebf5a3fd7f6f3b2df485bddd772002a81f14bcb3
# Parent f8540ab552bfccd1602c120d51d2f8fbb99e1045
Improve VTi domain fault handler panic path.
Currently when VTi fault handler finds something wrong, it enters
vmx_panic infinit loop with interrupt masked.
It makes sense if hw-based debugger is available.
However in most cases it doesn't make sense. Especially for users.
This patch makes those panicing path more user friendly to print out
panic message.
The old behaviour is left with vmx_panic configuration.
PATCHNAME: config_vmx_panic
Signed-off-by: Isaku Yamahata <yamahata@xxxxxxxxxxxxx>
diff -r f8540ab552bf -r ebf5a3fd7f6f xen/arch/ia64/Rules.mk
--- a/xen/arch/ia64/Rules.mk Thu Nov 22 12:35:52 2007 +0900
+++ b/xen/arch/ia64/Rules.mk Wed Nov 21 16:51:29 2007 +0900
@@ -7,6 +7,7 @@ xenoprof := y
xenoprof := y
no_warns ?= n
vti_debug ?= n
+vmx_panic ?= n
xen_ia64_expose_p2m ?= y
xen_ia64_pervcpu_vhpt ?= y
xen_ia64_tlb_track ?= y
@@ -39,6 +40,9 @@ CFLAGS += -g
CFLAGS += -g
ifeq ($(vti_debug),y)
CFLAGS += -DVTI_DEBUG
+endif
+ifeq ($(vmx_panic),y)
+CFLAGS += -DCONFIG_VMX_PANIC
endif
ifeq ($(xen_ia64_expose_p2m),y)
CFLAGS += -DCONFIG_XEN_IA64_EXPOSE_P2M
diff -r f8540ab552bf -r ebf5a3fd7f6f xen/arch/ia64/vmx/vmx_ivt.S
--- a/xen/arch/ia64/vmx/vmx_ivt.S Thu Nov 22 12:35:52 2007 +0900
+++ b/xen/arch/ia64/vmx/vmx_ivt.S Wed Nov 21 16:51:29 2007 +0900
@@ -113,11 +113,12 @@ vmx_fault_##n:;
(p7)br.sptk.many vmx_dispatch_reflection; \
br.sptk.many dispatch_to_fault_handler
+#ifdef CONFIG_VMX_PANIC
GLOBAL_ENTRY(vmx_panic)
br.sptk.many vmx_panic
;;
END(vmx_panic)
-
+#endif
@@ -1350,6 +1351,7 @@ ENTRY(vmx_dispatch_reflection)
VMX_SAVE_REST
mov rp=r14
;;
+ P6_BR_CALL_PANIC(.Lvmx_dispatch_reflection_string)
adds out4=16,r12
br.call.sptk.many b6=vmx_reflect_interruption
END(vmx_dispatch_reflection)
@@ -1372,6 +1374,7 @@ ENTRY(vmx_dispatch_virtualization_fault)
VMX_SAVE_EXTRA
mov rp=r14
;;
+ P6_BR_CALL_PANIC(.Lvmx_dispatch_virtualization_fault_string)
adds out1=16,sp //regs
br.call.sptk.many b6=vmx_emulate
END(vmx_dispatch_virtualization_fault)
@@ -1393,6 +1396,7 @@ GLOBAL_ENTRY(vmx_dispatch_vexirq)
movl r14=ia64_leave_hypervisor
;;
mov rp=r14
+ P6_BR_CALL_PANIC(.Lvmx_dispatch_vexirq_string)
br.call.sptk.many b6=vmx_vexirq
END(vmx_dispatch_vexirq)
@@ -1413,6 +1417,7 @@ ENTRY(vmx_dispatch_tlb_miss)
VMX_SAVE_REST
mov rp=r14
;;
+ P6_BR_CALL_PANIC(.Lvmx_dispatch_tlb_miss_string)
adds out2=16,r12
br.call.sptk.many b6=vmx_hpw_miss
END(vmx_dispatch_tlb_miss)
@@ -1437,6 +1442,7 @@ ENTRY(vmx_dispatch_break_fault)
VMX_SAVE_REST
mov rp=r14
;;
+ P6_BR_CALL_PANIC(.Lvmx_dispatch_break_fault_string)
adds out1=16,sp
br.call.sptk.many b6=vmx_ia64_handle_break
;;
@@ -1463,3 +1469,14 @@ ENTRY(vmx_dispatch_interrupt)
add out1=16,sp // pass pointer to pt_regs as second arg
br.call.sptk.many b6=ia64_handle_irq
END(vmx_dispatch_interrupt)
+
+.Lvmx_dispatch_reflection_string:
+ .asciz "vmx_dispatch_reflection\n"
+.Lvmx_dispatch_virtualization_fault_string:
+ .asciz "vmx_dispatch_virtualization_fault\n"
+.Lvmx_dispatch_vexirq_string:
+ .asciz "vmx_dispatch_vexirq\n"
+.Lvmx_dispatch_tlb_miss_string:
+ .asciz "vmx_dispatch_tlb_miss\n"
+.Lvmx_dispatch_break_fault_string:
+ .asciz "vmx_dispatch_break_fault\n"
diff -r f8540ab552bf -r ebf5a3fd7f6f xen/arch/ia64/vmx/vmx_minstate.h
--- a/xen/arch/ia64/vmx/vmx_minstate.h Thu Nov 22 12:35:52 2007 +0900
+++ b/xen/arch/ia64/vmx/vmx_minstate.h Wed Nov 21 16:51:29 2007 +0900
@@ -98,6 +98,8 @@
* r11 = FPSR_DEFAULT
* r12 = kernel sp (kernel virtual address)
* r13 = points to current task_struct (kernel virtual address)
+ * p6 = (psr.vm || isr.ni)
+ * panic if not external interrupt (fault in xen VMM)
* p15 = TRUE if psr.i is set in cr.ipsr
* predicate registers (other than p2, p3, and p15), b6, r3, r14, r15:
* preserved
@@ -105,6 +107,16 @@
* Note that psr.ic is NOT turned on by this macro. This is so that
* we can pass interruption state as arguments to a handler.
*/
+
+#ifdef CONFIG_VMX_PANIC
+# define P6_BR_VMX_PANIC (p6)br.spnt.few vmx_panic;
+#else
+# define P6_BR_VMX_PANIC /* nothing */
+#endif
+
+#define P6_BR_CALL_PANIC(panic_string) \
+(p6) movl out0=panic_string; \
+(p6) br.call.spnt.few b6=panic;
#define VMX_DO_SAVE_MIN(COVER,SAVE_IFS,EXTRA)
\
VMX_MINSTATE_GET_CURRENT(r16); /* M (or M;;I) */
\
@@ -118,9 +130,9 @@
;;
\
tbit.z p6,p0=r29,IA64_PSR_VM_BIT;
\
;;
\
- tbit.nz.or p6,p0 = r18,IA64_ISR_NI_BIT;
\
- ;;
\
-(p6)br.spnt.few vmx_panic;
\
+ tbit.nz.or p6,p0=r18,IA64_ISR_NI_BIT;
\
+ ;;
\
+ P6_BR_VMX_PANIC
\
tbit.z p0,p15=r29,IA64_PSR_I_BIT;
\
mov r1=r16;
\
/* mov r21=r16; */
\
16422_ebf5a3fd7f6f_config_vmx_panic.patch
Description: Text Data
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