[Xen-ia64-devel] [PATCH][GFW] Fix typo in SalProc

[Alex Williamson <alex.williamson@xxxxxx>]

   We're passing the width in place of the data for 1 byte PCI config
writes.  This shows up when the guest OS tries to write registers such
as the cache line size register.  With newer upstream Linux kernels,
this makes the rtl8139 non-functional as it tries to set a 128 byte
cache line size and fails.

   BTW, now that I understand a little better how PCI config operations
work in the GFW, I think my previous change to include 0xcfc/cf8 in the
_CRS method output is probably wrong.  Seems like we need to hide those
from the OS since they do have special meaning for qemu.  I'll send a
patch.  Thanks,

        Alex


Signed-off-by: Alex Williamson <alex.williamson@xxxxxx>
--

diff -r c238cddcd25b edk2-sparse/EdkXenPkg/Dxe/XenSal/Sal.c
--- a/edk2-sparse/EdkXenPkg/Dxe/XenSal/Sal.c    Wed Oct 24 02:50:08 2007 +0200
+++ b/edk2-sparse/EdkXenPkg/Dxe/XenSal/Sal.c    Mon Nov 05 11:22:31 2007 -0700
@@ -38,7 +38,7 @@ SalProc
   } else if (FunctionId == EFI_SAL_PCI_CONFIG_WRITE) {
     IoWrite32(0xcf8, BUILD_CMD(Arg2));
     if (Arg3 == 1)                           /* Writing byte  */
-      IoWrite8(0xCFC + ((REG_OFFSET(Arg2) & 3)), Arg3);
+      IoWrite8(0xCFC + ((REG_OFFSET(Arg2) & 3)), Arg4);
     else if (Arg3 == 2)                      /* Writing word  */
       IoWrite16(0xCFC + ((REG_OFFSET(Arg2) & 2)), Arg4);
     else                                    /* Writing dword */



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