Re: [Xen-ia64-devel] [Query] Regarding dtlb_miss Handler

[tgingold@xxxxxxx]

Quoting jeet <jeet_sat12@xxxxxxxxxxx>:

> Hi All
>
> I am trying to understand dtlb_miss handler for VMX domain, which
> would be called when VHPT walker could not find the entry in VHPT.
>
> I have some queries
>
> In following lines, check is made for vm bit in PSR when interrupt occur
Note: this is in fact ipsr, ie the PSR when the fault occured.

> Is this means, if currently guest is running(vm=1) and flow would go to line
> 225 and
No, if guest *was* running.  During the interruption handling, vm is 0.

> otherwise it would jump to vmx_alt_dtlb_miss_1(vm=0),  when this case would
> occur?
This interrupt can also happen during hypervisor execution.

> xen-3.0.4_1-src/xen/arch/ia64/vmx/vmx_ivt.S
>
> line216 ENTRY(vmx_dtlb_miss)
> ..
>
> ..
> line223        tbit.z p6,p7=r29,IA64_PSR_VM_BIT;
> line224     (p6)br.sptk vmx_alt_dtlb_miss_1
> line 225      mov r16 = cr.ifa
>
> So would code after line 225 be executed when guest is running?
> if so the executing the privilege instructions itc.d (line268) would cause
> virtualization fault?
> which would give controls to virtualization fault handler?
>
> Is my understanding is correct? if not please if anyone could explain this,
> that would be great help
You are slightly confused: this code is always run with vm=0 but the code
interrupted may be either guest code or hypervisor code.  Hence the test.

Tristan.

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