# HG changeset patch
# User dietmar.hahn@xxxxxxxxxxxxxxxxxxx
# Node ID 03923fec42c998f02e7655ab093dcb5b6d5d2166
# Parent  41d9f00140c51783ef4030b4f646feb36af7c195
Mask out reserved bits to avoid Reserved Register/Field faults.

Signed-off-by: Dietmar Hahn <dietmar.hahn@xxxxxxxxxxxxxxxxxxx>

diff -r 41d9f00140c5 -r 03923fec42c9 xen/arch/ia64/xen/vcpu.c
--- a/xen/arch/ia64/xen/vcpu.c	Fri Dec 15 10:49:11 2006 -0700
+++ b/xen/arch/ia64/xen/vcpu.c	Mon Dec 18 10:48:43 2006 +0100
@@ -2162,6 +2162,7 @@ vcpu_itc_no_srlz(VCPU * vcpu, u64 IorD, 
 	BUG_ON(logps > PAGE_SHIFT);
 	vcpu_tlb_track_insert_or_dirty(vcpu, vaddr, entry);
 	psr = ia64_clear_ic();
+	pte &= ~(_PAGE_RV2 | _PAGE_RV2);	// Mask out the reserved bits.
 	ia64_itc(IorD, vaddr, pte, ps);	// FIXME: look for bigger mappings
 	ia64_set_psr(psr);
 	// ia64_srlz_i(); // no srls req'd, will rfi later
diff -r 41d9f00140c5 -r 03923fec42c9 xen/include/asm-ia64/linux-xen/asm/pgtable.h
--- a/xen/include/asm-ia64/linux-xen/asm/pgtable.h	Fri Dec 15 10:49:11 2006 -0700
+++ b/xen/include/asm-ia64/linux-xen/asm/pgtable.h	Mon Dec 18 10:48:43 2006 +0100
@@ -35,7 +35,11 @@
 #define _PAGE_P_BIT		0
 #define _PAGE_A_BIT		5
 #define _PAGE_D_BIT		6
-
+#define _PAGE_RV1_BIT		1
+#define _PAGE_RV2_BIT		50
+
+#define _PAGE_RV1		(__IA64_UL(1) << _PAGE_RV1_BIT)	/* reserved bit */
+#define _PAGE_RV2		(__IA64_UL(3) << _PAGE_RV2_BIT)	/* reserved bits */
 #define _PAGE_P			(1 << _PAGE_P_BIT)	/* page present bit */
 #define _PAGE_MA_WB		(0x0 <<  2)	/* write back memory attribute */
 #ifdef XEN