# HG changeset patch
# User yamahata@xxxxxxxxxxxxx
# Node ID 9644f2141cc806129da2e168da62ffec98267a04
# Parent  f954df91012e8ce9435022694aa5b45f9b9e92e0
add memory barrier to domain_flush_vtlb_range().
vtlb purge must be visible before vhpt invalidation.
added some BUG_ON().
PATCHNAME: smp_mb_domain_flush_vtlb_range

Signed-off-by: Isaku Yamahata <yamahata@xxxxxxxxxxxxx>

diff -r f954df91012e -r 9644f2141cc8 xen/arch/ia64/xen/vcpu.c
--- a/xen/arch/ia64/xen/vcpu.c	Thu Jun 08 18:27:08 2006 +0900
+++ b/xen/arch/ia64/xen/vcpu.c	Thu Jun 08 18:27:10 2006 +0900
@@ -2016,6 +2016,8 @@ IA64FAULT vcpu_itc_i(VCPU *vcpu, UINT64 
 
 IA64FAULT vcpu_ptc_l(VCPU *vcpu, UINT64 vadr, UINT64 log_range)
 {
+	BUG_ON(vcpu != current);
+
 	/* Purge TC  */
 	vcpu_purge_tr_entry(&PSCBX(vcpu,dtlb));
 	vcpu_purge_tr_entry(&PSCBX(vcpu,itlb));
@@ -2082,6 +2084,7 @@ IA64FAULT vcpu_ptr_d(VCPU *vcpu,UINT64 v
 	unsigned long rid, rr;
 	int i;
 	TR_ENTRY *trp;
+	BUG_ON(vcpu != current);
 
 	rr = PSCB(vcpu,rrs)[region];
 	rid = rr & RR_RID_MASK;
@@ -2110,6 +2113,7 @@ IA64FAULT vcpu_ptr_i(VCPU *vcpu,UINT64 v
 	unsigned long rid, rr;
 	int i;
 	TR_ENTRY *trp;
+	BUG_ON(vcpu != current);
 
 	rr = PSCB(vcpu,rrs)[region];
 	rid = rr & RR_RID_MASK;
diff -r f954df91012e -r 9644f2141cc8 xen/arch/ia64/xen/vhpt.c
--- a/xen/arch/ia64/xen/vhpt.c	Thu Jun 08 18:27:08 2006 +0900
+++ b/xen/arch/ia64/xen/vhpt.c	Thu Jun 08 18:27:10 2006 +0900
@@ -202,10 +202,14 @@ void domain_flush_vtlb_range (struct dom
 		   FIXME: clear only if match.  */
 		vcpu_purge_tr_entry(&PSCBX(v,dtlb));
 		vcpu_purge_tr_entry(&PSCBX(v,itlb));
-
+	}
+	smp_mb();
+
+	for_each_vcpu (d, v) {
 		/* Invalidate VHPT entries.  */
 		cpu_flush_vhpt_range (v->processor, vadr, addr_range);
 	}
+	// ptc.ga has release semantics.
 
 	/* ptc.ga  */
 	ia64_global_tlb_purge(vadr,vadr+addr_range,PAGE_SHIFT);