# HG changeset patch # User gingold@virtu10 # Node ID aa735b8a4de32b136ac82cb63600b52d2d1e935d # Parent 2efaa074882a4811f3bf6486d55ad49555d07971 Remove iva field of arch_vcpu, use iva field of privregs domain. Signed-off-by: Tristan Gingold diff -r 2efaa074882a -r aa735b8a4de3 xen/arch/ia64/asm-offsets.c --- a/xen/arch/ia64/asm-offsets.c Tue Jun 13 14:19:11 2006 +0200 +++ b/xen/arch/ia64/asm-offsets.c Tue Jun 13 14:33:34 2006 +0200 @@ -49,7 +49,6 @@ void foo(void) DEFINE(IA64_VCPU_META_RR0_OFFSET, offsetof (struct vcpu, arch.metaphysical_rr0)); DEFINE(IA64_VCPU_META_SAVED_RR0_OFFSET, offsetof (struct vcpu, arch.metaphysical_saved_rr0)); DEFINE(IA64_VCPU_BREAKIMM_OFFSET, offsetof (struct vcpu, arch.breakimm)); - DEFINE(IA64_VCPU_IVA_OFFSET, offsetof (struct vcpu, arch.iva)); DEFINE(IA64_VCPU_IRR0_OFFSET, offsetof (struct vcpu, arch.irr[0])); DEFINE(IA64_VCPU_IRR3_OFFSET, offsetof (struct vcpu, arch.irr[3])); DEFINE(IA64_VCPU_INSVC3_OFFSET, offsetof (struct vcpu, arch.insvc[3])); diff -r 2efaa074882a -r aa735b8a4de3 xen/arch/ia64/asm-xsi-offsets.c --- a/xen/arch/ia64/asm-xsi-offsets.c Tue Jun 13 14:19:11 2006 +0200 +++ b/xen/arch/ia64/asm-xsi-offsets.c Tue Jun 13 14:33:34 2006 +0200 @@ -76,6 +76,7 @@ void foo(void) DEFINE(XSI_ITIR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, itir))); DEFINE(XSI_ITV_OFS, (XSI_OFS + offsetof(mapped_regs_t, itv))); DEFINE(XSI_ITV, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, itv))); + DEFINE(XSI_IVA_OFS, (XSI_OFS + offsetof(mapped_regs_t, iva))); DEFINE(XSI_PTA_OFS, (XSI_OFS + offsetof(mapped_regs_t, pta))); DEFINE(XSI_PTA, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, pta))); DEFINE(XSI_PSR_IC_OFS, (XSI_OFS + offsetof(mapped_regs_t, interrupt_collection_enabled))); diff -r 2efaa074882a -r aa735b8a4de3 xen/arch/ia64/xen/faults.c --- a/xen/arch/ia64/xen/faults.c Tue Jun 13 14:19:11 2006 +0200 +++ b/xen/arch/ia64/xen/faults.c Tue Jun 13 14:33:34 2006 +0200 @@ -116,7 +116,7 @@ void reflect_interruption(unsigned long PSCB(v,ifs) = 0; PSCB(v,incomplete_regframe) = 0; - regs->cr_iip = ((unsigned long) PSCBX(v,iva) + vector) & ~0xffUL; + regs->cr_iip = ((unsigned long) PSCB(v,iva) + vector) & ~0xffUL; regs->cr_ipsr = (regs->cr_ipsr & ~DELIVER_PSR_CLR) | DELIVER_PSR_SET; regs->r31 = XSI_IPSR; @@ -264,7 +264,7 @@ void ia64_do_page_fault (unsigned long a check_bad_nested_interruption(isr,regs,fault); //printf("Delivering NESTED DATA TLB fault\n"); fault = IA64_DATA_NESTED_TLB_VECTOR; - regs->cr_iip = ((unsigned long) PSCBX(current,iva) + fault) & ~0xffUL; + regs->cr_iip = ((unsigned long) PSCB(current,iva) + fault) & ~0xffUL; regs->cr_ipsr = (regs->cr_ipsr & ~DELIVER_PSR_CLR) | DELIVER_PSR_SET; // NOTE: nested trap must NOT pass PSCB address //regs->r31 = (unsigned long) &PSCB(current); diff -r 2efaa074882a -r aa735b8a4de3 xen/arch/ia64/xen/hyperprivop.S --- a/xen/arch/ia64/xen/hyperprivop.S Tue Jun 13 14:19:11 2006 +0200 +++ b/xen/arch/ia64/xen/hyperprivop.S Tue Jun 13 14:33:34 2006 +0200 @@ -296,11 +296,9 @@ ENTRY(hyper_ssm_i) st8 [r21]=r20 ;; // leave cr.ifs alone for later rfi // set iip to go to domain IVA break instruction vector - movl r22=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;; - ld8 r22=[r22];; - adds r22=IA64_VCPU_IVA_OFFSET,r22;; - ld8 r23=[r22];; - movl r24=0x3000;; + adds r22=XSI_IVA_OFS-XSI_PSR_IC_OFS,r18;; + ld8 r23=[r22] + mov r24=0x3000;; add r24=r24,r23;; mov cr.iip=r24;; // OK, now all set to go except for switch to virtual bank0 @@ -476,9 +474,9 @@ GLOBAL_ENTRY(fast_tick_reflect) st8 [r21]=r20 ;; // leave cr.ifs alone for later rfi // set iip to go to domain IVA break instruction vector - adds r22=IA64_VCPU_IVA_OFFSET,r19;; - ld8 r23=[r22];; - movl r24=0x3000;; + adds r22=XSI_IVA_OFS-XSI_PSR_IC_OFS,r18;; + ld8 r23=[r22] + mov r24=0x3000;; add r24=r24,r23;; mov cr.iip=r24;; // OK, now all set to go except for switch to virtual bank0 @@ -653,9 +651,7 @@ ENTRY(fast_reflect) st8 [r21]=r24 ;; // FIXME: need to save iipa and isr to be arch-compliant // set iip to go to domain IVA break instruction vector - movl r22=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;; - ld8 r22=[r22];; - adds r22=IA64_VCPU_IVA_OFFSET,r22;; + adds r22=XSI_IVA_OFS-XSI_PSR_IC_OFS,r18;; ld8 r23=[r22];; add r20=r20,r23;; mov cr.iip=r20;; @@ -1266,9 +1262,9 @@ ENTRY(rfi_with_interrupt) st8 [r22]=r20 ;; #endif // set iip to go to domain IVA break instruction vector - adds r22=IA64_VCPU_IVA_OFFSET,r30;; - ld8 r23=[r22];; - movl r24=0x3000;; + adds r22=XSI_IVA_OFS-XSI_PSR_IC_OFS,r18;; + ld8 r23=[r22] + mov r24=0x3000;; add r24=r24,r23;; mov cr.iip=r24;; #if 0 diff -r 2efaa074882a -r aa735b8a4de3 xen/arch/ia64/xen/vcpu.c --- a/xen/arch/ia64/xen/vcpu.c Tue Jun 13 14:19:11 2006 +0200 +++ b/xen/arch/ia64/xen/vcpu.c Tue Jun 13 14:33:34 2006 +0200 @@ -455,11 +455,7 @@ IA64FAULT vcpu_get_dcr(VCPU *vcpu, UINT6 IA64FAULT vcpu_get_iva(VCPU *vcpu, UINT64 *pval) { - if(VMX_DOMAIN(vcpu)){ *pval = PSCB(vcpu,iva) & ~0x7fffL; - }else{ - *pval = PSCBX(vcpu,iva) & ~0x7fffL; - } return (IA64_NO_FAULT); } @@ -578,11 +574,7 @@ IA64FAULT vcpu_set_dcr(VCPU *vcpu, UINT6 IA64FAULT vcpu_set_iva(VCPU *vcpu, UINT64 val) { - if(VMX_DOMAIN(vcpu)){ PSCB(vcpu,iva) = val & ~0x7fffL; - }else{ - PSCBX(vcpu,iva) = val & ~0x7fffL; - } return (IA64_NO_FAULT); } diff -r 2efaa074882a -r aa735b8a4de3 xen/include/asm-ia64/domain.h --- a/xen/include/asm-ia64/domain.h Tue Jun 13 14:19:11 2006 +0200 +++ b/xen/include/asm-ia64/domain.h Tue Jun 13 14:33:34 2006 +0200 @@ -113,7 +113,6 @@ struct arch_vcpu { unsigned long irr[4]; /* Interrupt request register. */ unsigned long insvc[4]; /* Interrupt in service. */ - unsigned long iva; unsigned long domain_itm; unsigned long domain_itm_last;