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Re: [Xen-ia64-devel][PATCH] Enable SMP on VTI domain.

To: "Xu, Anthony" <anthony.xu@xxxxxxxxx>
Subject: Re: [Xen-ia64-devel][PATCH] Enable SMP on VTI domain.
From: Isaku Yamahata <yamahata@xxxxxxxxxxxxx>
Date: Wed, 21 Jun 2006 18:25:13 +0900
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On Thu, Jun 01, 2006 at 12:55:08PM +0800, Xu, Anthony wrote:

> >> Or you mean the protection of global purge.
> >> When a vcpu get IPI to purge TLB,
> >> What it does is to invalid the TLB entry in VHPT,
> >> but not remove the TLB entry.
> >> There is no race condition.
> >
> >Is there any gurantee that the vcpu which recives IPI isn't touching VHPT?
> The vcpu which receives IPI can touch VHPT in the same time.
> Because purge operation only sets the TLB entry invalid, like entry->ti=1.
> That has the same philosophy with Tristan's direct purge

Could you review the two attached patches?
Purge function traverses the collision chain when IPI is sent.
But there is a window when the assumption of the collision chain
is broken.
vmx_hpw_miss() has a race. ia64_do_page_fault() had a similar race before.


Attachment: 10474:c5c599141647_local_irq_save_local_irq_restore.patch
Description: Text document

Attachment: 10475:c7cd1af74a38_vtlb_vhpt_collision_chain_may_have_invalid_entry.patch
Description: Text document

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