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Re: [Xen-ia64-devel] RFC: ptc.ga implementation for SMP-g

To: Alex Williamson <alex.williamson@xxxxxx>
Subject: Re: [Xen-ia64-devel] RFC: ptc.ga implementation for SMP-g
From: Tristan Gingold <Tristan.Gingold@xxxxxxxx>
Date: Tue, 4 Apr 2006 09:18:46 +0100
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Le Lundi 03 Avril 2006 20:01, Alex Williamson a écrit :
> On Mon, 2006-04-03 at 14:38 +0100, Tristan Gingold wrote:
> > Hi,
> >
> > after the comments, here is my updated patch for ptc.ga
> > Please comment it.
> >
> > With this patch, the page_flags are always written atomically.  Ptc only
> > clear it.  This eliminates itc and ptc conflicts.
> >
> > The other conflict is use.  This is within ia64_page_fault, between
> > vcpu_translate and vcpu_itc_no_srlz.  This part of code is protected by a
> > flag + counter: At entry the flag is set and the counter increment, at
> > exit the flag is reset.  Ptc.ga waits if the flag is set and retries if
> > the counter has changes.
>
> Hi Tristan,
>
>    Is there any way a nested page fault could double increment tlb_inuse
> (ie. where you might hit that BUG_ON)? 
I don't think so.  If a fault occurs within vcpu_translate, it is a xen fault 
which won't result in calling ia64_page_fault.  vcpu_translate reads domain 
memory (guest VHPT entry), but in case of failure it doesn't inject a fault.

> This locking looks a lot like a
> seqlock.  Could the bit in ia64_do_page_fault() be replaced by:
Thank for this.
[...]

>    BTW, lkml strongly discourages setting variables inside tests like
> while ((count = PSCBX(vcpu, tlb_inuse)) & 1).  The preferred mechanism
> is to separate them into two statements:
>
>       count = PSCBX(vcpu, tlb_inuse);
>       while (count & 1)
Is it a style point ?
Note that your sequence it different from my sequence.

Thank you for your comments.

Tristan.



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