RE: [Xen-ia64-devel]Question about priv_ptc_e

["Xu, Anthony" <anthony.xu@xxxxxxxxx>]

>From: Magenheimer, Dan (HP Labs Fort Collins) [mailto:dan.magenheimer@xxxxxx]
>Sent: 2006年3月14日 3:08
>To: Xu, Anthony; Tristan Gingold
>Cc: xen-ia64-devel@xxxxxxxxxxxxxxxxxxx
>Subject: RE: [Xen-ia64-devel]Question about priv_ptc_e
>
>> Subject: RE: [Xen-ia64-devel]Question about priv_ptc_e
>>
>> Dan,
>> Thanks for your sharing,
>> This will definitely help developers in community greatly.
>>
>> I still have some questions.
>>
>> >into a privileged instruction.  This meant I couldn't
>> >always just use a "break" instruction.
>> I don't understand this, is this because fc has a parameter?
>> But I don't think it is a big deal.
>
>Yes, I had forgotten about that.  FC has a parameter
>so would require 128 different break immediate values
>to encode the full set of possible FC instructions.
>
>But it gets worse:  Several of the privileged instructions
>(e.g. thash) have two parameters, a source and a destination
>register.  Thus to fully encode all possible combinations
>of each of these instructions into break would require
>2**14 break immediate values.
>
Understand.

>> *    mov rx=ar.cflg -> mov ar.cflg=r(x+64) [**]
>> Did you find linux kernel use ar.cflg?
>
>I don't remember whether I included this for completeness
>or if it was necessary if CONFIG_IA32_SUPPORT was
>turned on (which never got implemented in Xen/ia64).
>
>Dan
Thanks,
Anthony

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