# HG changeset patch
# User yamahata@xxxxxxxxxxxxx
# Node ID 60fe32303c84497e7cb844e09dd574e7ca5c86b9
# Parent  111af742e414e174456bca5d0edbb47641031fe2
made translate_domain_pte() aware _PAGE_ED bits.
_PAGE_PPN_MASK doesn't mask ED bit. 
ED bit must be handled explicitly. 
This case can occur by vcpu_itc_d().

Signed-off-by: Isaku Yamahata <yamahata@xxxxxxxxxxxxx>

diff -r 111af742e414 -r 60fe32303c84 xen/arch/ia64/xen/process.c
--- a/xen/arch/ia64/xen/process.c	Sat Feb 18 21:25:31 2006 -0700
+++ b/xen/arch/ia64/xen/process.c	Mon Feb 20 17:25:52 2006 +0900
@@ -95,7 +95,8 @@ unsigned long translate_domain_pte(unsig
 
 	// FIXME address had better be pre-validated on insert
 	mask = (1L << ((itir >> 2) & 0x3f)) - 1;
-	mpaddr = ((pteval & _PAGE_PPN_MASK) & ~mask) | (address & mask);
+	BUG_ON(pteval & ~((1UL << 53) - 1));
+	mpaddr = (((pteval & ~_PAGE_ED) & _PAGE_PPN_MASK) & ~mask) | (address & mask);
 	if (d == dom0) {
 		if (mpaddr < dom0_start || mpaddr >= dom0_start + dom0_size) {
 			//printk("translate_domain_pte: out-of-bounds dom0 mpaddr %p! itc=%lx...\n",mpaddr,ia64_get_itc());
@@ -110,6 +111,7 @@ unsigned long translate_domain_pte(unsig
 	}
 	pteval2 = lookup_domain_mpa(d,mpaddr);
 	pteval2 &= _PAGE_PPN_MASK; // ignore non-addr bits
+	pteval2 |= (pteval & _PAGE_ED);
 	pteval2 |= _PAGE_PL_2; // force PL0->2 (PL3 is unaffected)
 	pteval2 = (pteval & ~_PAGE_PPN_MASK) | pteval2;
 	return pteval2;