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[Xen-ia64-devel] PMT vs. 3 level page table (was: Xen/ia64 - global or p

To: "Magenheimer, Dan \(HP Labs Fort Collins\)" <dan.magenheimer@xxxxxx>, "Yang, Fred" <fred.yang@xxxxxxxxx>
Subject: [Xen-ia64-devel] PMT vs. 3 level page table (was: Xen/ia64 - global or per VP VHPT)
From: "Dong, Eddie" <eddie.dong@xxxxxxxxx>
Date: Thu, 5 May 2005 21:30:32 +0800
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Thread-topic: PMT vs. 3 level page table (was: Xen/ia64 - global or per VP VHPT)
Magenheimer, Dan (HP Labs Fort Collins) wrote:
> I left the 3-level page tables in for
> guest-physical-to-machine-physical because I expected physical memory
> on ia64 to generally be much 
> larger than x86 and the existing Linux method for handling VA
> spaces seemed suitable.  Is there Xen-common code for this
> that is better?  (I think this code is archdep right now, though
> I suppose it could be moved back from archdep to common if it
> is truly architecture-independent, e.g. if ppc could use it too.)
> 
Dan, maybe I didn't understand the benefit well. What is the benifit of
3 level page table?
PMT is very strightforward for VMM although it may consume more memory
in IA64 than in IA32.
In my strightforward thinking, a PMT even consume less memory than page
table.
 What is the reason for 3 level page table? 
BTW, I am assume HV always present guest linear memory space 
from 0 -- XXX except domain 0 which is directly mapped, and I guess your
3 level page table is also per
domain instance.
Eddie

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