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[Xen-devel] Re: [PATCH 2 of 6] amd iommu: Cleanup iommu pci capabilites

from [Jan Beulich]

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To:	"Wei Wang" <wei.wang2@xxxxxxx>
Subject:	[Xen-devel] Re: [PATCH 2 of 6] amd iommu: Cleanup iommu pci capabilites detection
From:	"Jan Beulich" <JBeulich@xxxxxxxx>
Date:	Fri, 11 Nov 2011 09:33:07 +0000
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>>> On 09.11.11 at 16:50, Wei Wang <wei.wang2@xxxxxxx> wrote:
> # HG changeset patch
> # User Wei Wang <wei.wang2@xxxxxxx>
> # Date 1320851997 -3600
> # Node ID 4b115815bc13e4f2a3a178f3de7477ecf46cb44b
> # Parent  4769713326a876c25bdc0f9d1f90594f90fba9c5
> amd iommu: Cleanup iommu pci capabilites detection.
> * Define new structure to represent capability block.
> * Remove unnecessary read for unused information.
> * Add sanity check into get_iommu_capabilities.
> * iommu capability offset is 16 bit not 8 bit, fix that.

Does this imply that the capability can reside in extended config space?
If so, all code paths using this will need revisiting with regard to
extended config space possibly being inaccessible until early Dom0
initialization.

Jan

> Signed-off-by: Wei Wang <wei.wang2@xxxxxxx>



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[Xen-devel] [PATCH 0 of 6] amd iommu: cleanup codes, Wei Wang [Xen-devel] [PATCH 3 of 6] amd iommu: Simplify IVHD device flag handling, Wei Wang [Xen-devel] [PATCH 4 of 6] amd iommu: Disable debug output for early DTE update, Wei Wang [Xen-devel] [PATCH 5 of 6] amd iommu: Compress hyper-transport flags into a single byte, Wei Wang [Xen-devel] [PATCH 1 of 6] amd iommu: Use pci access function to detect msi capabilities, Wei Wang [Xen-devel] [PATCH 6 of 6] amd iommu: Introduce iommu_has_cap() function, Wei Wang [Xen-devel] [PATCH 2 of 6] amd iommu: Cleanup iommu pci capabilites detection, Wei Wang [Xen-devel] Re: [PATCH 2 of 6] amd iommu: Cleanup iommu pci capabilites detection, Jan Beulich <= [Xen-devel] Re: [PATCH 2 of 6] amd iommu: Cleanup iommu pci capabilites detection, Wei Wang2

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