WARNING - OLD ARCHIVES

This is an archived copy of the Xen.org mailing list, which we have preserved to ensure that existing links to archives are not broken. The live archive, which contains the latest emails, can be found at http://lists.xen.org/
   
 
 
Xen 
 
Home Products Support Community News
 
   
 

xen-devel

Re: [Xen-devel] [PATCH] AMD IOMMU: Use global interrupt remapping table

To: Wei Wang2 <wei.wang2@xxxxxxx>
Subject: Re: [Xen-devel] [PATCH] AMD IOMMU: Use global interrupt remapping table by default
From: George Dunlap <George.Dunlap@xxxxxxxxxxxxx>
Date: Tue, 19 Jul 2011 15:14:31 +0100
Cc: xen-devel@xxxxxxxxxxxxxxxxxxx
Delivery-date: Tue, 19 Jul 2011 07:15:29 -0700
Dkim-signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=oq+RGXqXX17NCzqKZxM9ANWrprS5t1VHcRI5VwwcUps=; b=InF6AH4p2ncsEP3UWzdMYSoGJkR2mAgs9JMy5uoHBqqkvGBIDIProRSyqUrOCmzgF4 IsTTexvB0oe8yDfAhPxmsFiT1iwgIJemdBx3fjW84cDEoygAiGpbdOida/pl23cSY7jb o+kgeU9O16OAGcI38rrKlvhqcwPIXSs5yJKq8=
Envelope-to: www-data@xxxxxxxxxxxxxxxxxxx
In-reply-to: <200910281732.07420.wei.wang2@xxxxxxx>
List-help: <mailto:xen-devel-request@lists.xensource.com?subject=help>
List-id: Xen developer discussion <xen-devel.lists.xensource.com>
List-post: <mailto:xen-devel@lists.xensource.com>
List-subscribe: <http://lists.xensource.com/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=subscribe>
List-unsubscribe: <http://lists.xensource.com/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=unsubscribe>
References: <200910281732.07420.wei.wang2@xxxxxxx>
Sender: xen-devel-bounces@xxxxxxxxxxxxxxxxxxx
Wei,

Can you be more specific about which BIOSes behave poorly with
per-device intremap tables, and why?

The problem with a global intremap table is that, AFAICT, it's not
fundamentally compatible with per-cpu IDTs.  With per-cpu IDTs,
different devices may end up with interrupts mapped to different cpus
but the same vector (i.e., device A mapped to cpu 9 vector 67, cpu B
mapped to cpu 12 vector 67).  This is by design; the whole point of
the per-cpu IDTs is to avoid restricting the number of IRQs to the
number of vectors.   But it seems that the intremap table only maps
vectors, not destination IDs; so in the example above, both devices'
interrupts would end up being remapped to the same place, causing one
device driver to get both sets of interrupts, and the other to get
none.

Do I understand correctly?  If so, it seems like we should switch to
per-device intremap tables by default; and if we're using a global
intremap table, we need to somehow make sure that vectors are not
shared across cpus.

 -George

On Wed, Oct 28, 2009 at 4:32 PM, Wei Wang2 <wei.wang2@xxxxxxx> wrote:
> Using a global interrupt remapping table shared by all devices has better
> compatibility with certain old BIOSes. Per-device interrupt remapping table
> can still be enabled by using a new parameter "amd-iommu-perdev-intremap".
> Thanks,
> Wei
>
> Signed-off-by: Wei Wang <wei.wang2@xxxxxxx>
> --
> AMD GmbH, Germany
> Operating System Research Center
>
> Legal Information:
> Advanced Micro Devices GmbH
> Karl-Hammerschmidt-Str. 34
> 85609 Dornach b. München
>
> Geschäftsführer: Andrew Bowd, Thomas M. McCoy, Giuliano Meroni
> Sitz: Dornach, Gemeinde Aschheim, Landkreis München
> Registergericht München, HRB Nr. 43632
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@xxxxxxxxxxxxxxxxxxx
> http://lists.xensource.com/xen-devel
>
>

_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-devel