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Re: [Xen-devel] [PATCH 4/5][RFC] lwp: adding support for AMD lightweight

To: <Wei.Huang2@xxxxxxx>
Subject: Re: [Xen-devel] [PATCH 4/5][RFC] lwp: adding support for AMD lightweight profiling
From: "Jan Beulich" <JBeulich@xxxxxxxxxx>
Date: Mon, 14 Feb 2011 09:12:26 +0000
Cc: "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>, KeirFraser <keir@xxxxxxx>, Gang Wei <gang.wei@xxxxxxxxx>
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>>> On 11.02.11 at 17:29, Wei Huang <wei.huang2@xxxxxxx> wrote:
>--- a/xen/arch/x86/i387.c      Thu Feb 10 16:25:09 2011 -0600
>+++ b/xen/arch/x86/i387.c      Thu Feb 10 16:55:27 2011 -0600
>@@ -65,6 +65,55 @@
> static void init_fpu(void);
> static void restore_fpu(struct vcpu *v);
> 
>+/* Save AMD LWP */
>+void xsave_lwp(struct vcpu *v)
>+{
>+    uint64_t lwpcb;
>+    bool_t ts;
>+    struct xsave_struct *xsave_area = v->arch.xsave_area;
>+
>+    if ( cpu_has_lwp )
>+    {
>+        /* Has LWP been used? */
>+        rdmsrl(MSR_AMD_LWP_CBADDR, lwpcb);

There's no way to track LWP-using state for a vCPU, is there?
rdmsr seems pretty expensive for being used in the context
switch unconditionally (on CPUs supporting LWP)...

>+        if ( !lwpcb ) {
>+            /* Guest might have turned off LWP. So clean the bit here. */
>+            xsave_area->xsave_hdr.xstate_bv &= ~XSTATE_LWP;
>+            return;
>+        }
>+        
>+        /* Disable TS temporarily to avoid recursion. */
>+        ts = read_cr0() & X86_CR0_TS;
>+        clts();
>+        xsave(v, XSTATE_LWP);
>+        if ( ts )
>+            stts();

Together with the xrstor_lwp() ones, quite a few manipulations of
CR0, and hence making context switch between two LWP-using
vcpus pretty expensive. I'm sure some of this redundancy can be
eliminated.

Jan


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