WARNING - OLD ARCHIVES

This is an archived copy of the Xen.org mailing list, which we have preserved to ensure that existing links to archives are not broken. The live archive, which contains the latest emails, can be found at http://lists.xen.org/
   
 
 
Xen 
 
Home Products Support Community News
 
   
 

xen-devel

[Xen-devel] [PATCH 3/3] HVM: Support XSAVE/XRSTOR and AVX for AMD CPUs

To: <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: [Xen-devel] [PATCH 3/3] HVM: Support XSAVE/XRSTOR and AVX for AMD CPUs
From: Wei Huang <wei.huang2@xxxxxxx>
Date: Fri, 3 Dec 2010 09:43:46 -0600
Cc: keir@xxxxxxx
Delivery-date: Fri, 03 Dec 2010 07:46:32 -0800
Envelope-to: www-data@xxxxxxxxxxxxxxxxxxx
List-help: <mailto:xen-devel-request@lists.xensource.com?subject=help>
List-id: Xen developer discussion <xen-devel.lists.xensource.com>
List-post: <mailto:xen-devel@lists.xensource.com>
List-subscribe: <http://lists.xensource.com/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=subscribe>
List-unsubscribe: <http://lists.xensource.com/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=unsubscribe>
Organization: AMD
Reply-to: wei.huang2@xxxxxxx
Sender: xen-devel-bounces@xxxxxxxxxxxxxxxxxxx
Enable SVM intercept for xsetbv instruction.

SVM introduces an intercept control bit for xsetbv instruction. This
patches enables xsetbv intercept for SVM.

Signed-off-by: Wei Huang <wei.huang2@xxxxxxx>


Attachment: amd_xsave_support_patch_3.txt
Description: amd_xsave_support_patch_3.txt

_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-devel
<Prev in Thread] Current Thread [Next in Thread>
  • [Xen-devel] [PATCH 3/3] HVM: Support XSAVE/XRSTOR and AVX for AMD CPUs, Wei Huang <=