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Re: [Xen-devel] [PATCH] VPMU issue on Nehalem cpus
| To: | Jan Beulich <JBeulich@xxxxxxxxxx>, Dietmar Hahn <dietmar.hahn@xxxxxxxxxxxxxx> |
|---|---|
| Subject: | Re: [Xen-devel] [PATCH] VPMU issue on Nehalem cpus |
| From: | Keir Fraser <keir@xxxxxxx> |
| Date: | Mon, 22 Nov 2010 09:28:57 +0000 |
| Cc: | xen-devel@xxxxxxxxxxxxxxxxxxx, Haitao Shan <haitao.shan@xxxxxxxxx> |
| Delivery-date: | Mon, 22 Nov 2010 01:30:16 -0800 |
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| Thread-topic: | [Xen-devel] [PATCH] VPMU issue on Nehalem cpus |
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On 22/11/2010 09:19, "Jan Beulich" <JBeulich@xxxxxxxxxx> wrote: >>>> + val = msr_content & ((1 << num_gen_pmc) - 1); >>> >>> What's the point of masking if the subsequent loop looks at the >>> bottom so many bits only anyway? >> >> Bits 0-31 flag the overflow of the general counters (currently max 4) and >> 32-63 >> flag the overflow of the fixed counter (currently max 3). >> Yes the first mask is not necessary, maybe a comment would be better? > > Neither is the second mask (below) - the shift is all that's really > needed. Afaic, a comment doesn't seem necessary, but Keir > may by of different opinion here. It's clear from the code that the mask operation is unnecessary. No code comment required. -- Keir _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel |
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