Mask AMD CPUID masks in software before writing them to the MSRs.
Setting bits in the CPUID mask MSR that are not set in the unmasked
CPUID response can cause those bits to be set in the masked response.
Avoid that by explicitly masking in software.

Signed-off-by: Tim Deegan <Tim.Deegan@xxxxxxxxxx>

diff -r fea0fc811dd3 xen/arch/x86/cpu/amd.c
--- a/xen/arch/x86/cpu/amd.c	Tue Feb 16 15:54:59 2010 +0000
+++ b/xen/arch/x86/cpu/amd.c	Tue Feb 16 16:51:16 2010 +0000
@@ -128,6 +128,14 @@
 		printk("CPUID will not be masked\n");
 		return;
 	}
+
+        /* Setting bits in the CPUID mask MSR that are not set in the
+         * unmasked CPUID response can cause those bits to be set in the
+         * masked response.  Avoid that by explicitly masking in software. */
+        feat_ecx &= cpuid_ecx(0x00000001);
+        feat_edx &= cpuid_edx(0x00000001);
+        extfeat_ecx &= cpuid_ecx(0x80000001);
+        extfeat_edx &= cpuid_edx(0x80000001);
 
 	status = set_mask;
 	printk("Writing CPUID feature mask ECX:EDX -> %08Xh:%08Xh\n",