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Re: [Xen-devel] [help] rsp in case of interrupt/exception in ring0
| To: | "Xen-devel@xxxxxxxxxxxxxxxxxxx" <Xen-devel@xxxxxxxxxxxxxxxxxxx>, "Mukesh Rathor" <mukesh.rathor@xxxxxxxxxx> |
|---|---|
| Subject: | Re: [Xen-devel] [help] rsp in case of interrupt/exception in ring0 |
| From: | "Jan Beulich" <JBeulich@xxxxxxxxxx> |
| Date: | Wed, 24 Feb 2010 08:35:31 +0000 |
| Cc: | |
| Delivery-date: | Wed, 24 Feb 2010 00:36:07 -0800 |
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>>> Mukesh Rathor <mukesh.rathor@xxxxxxxxxx> 24.02.10 04:39 >>> >When a cpu is in hyp code and int/exception comes in, how/where is rsp >saved? According to intel manual if there's no ring transition, then >the cpu doesn't save ss/rsp. As you're apparently talking about x86-64, you probably simply read the wrong (32-bit) part of the manual. On 64-bits, ss:rsp are always getting saved, no matter whether there's a ring transition. Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel |
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