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[Xen-devel] RE: Saving/Restoring IA32_TSC_AUX MSR

To: Dan Magenheimer <dan.magenheimer@xxxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: [Xen-devel] RE: Saving/Restoring IA32_TSC_AUX MSR
From: "Nakajima, Jun" <jun.nakajima@xxxxxxxxx>
Date: Wed, 9 Dec 2009 09:07:48 -0800
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Thread-topic: Saving/Restoring IA32_TSC_AUX MSR
Dan Magenheimer wrote on Wed, 9 Dec 2009 at 08:59:59:

> Hi Jun --
> 

Dan,

> Xen doesn't expose the TSC rdtscp bit so assumes that
> no guests depend on it.  So no save/restore of TSC_AUX
> is necessary.  Xen could provide support for the TSC

But it's possible that multiple domains use the pvrdtscp algorithm, and the 
incarnation number is domain specific. We also have the issue when adding 
RDTSCP support for HVM guests.

> rdtscp bit and allow a guest OS to manage TSC_AUX, but
> the existing use of TSC_AUX by Linux would fail to
> provide the desired result across migration, so there's
> little point.  Also the pvrdtscp algorithm now assumes
> that Xen itself is responsible for updating TSC_AUX
> whenever a migration (across physical machines) occurs.
> 
> The #define for write_rdtscp_aux is from Linux source,
> so I didn't change the code and define the constant.
> 
> Dan
> 
>> -----Original Message-----
>> From: Nakajima, Jun [mailto:jun.nakajima@xxxxxxxxx]
>> Sent: Wednesday, December 09, 2009 9:42 AM
>> To: xen-devel@xxxxxxxxxxxxxxxxxxx
>> Cc: Dan Magenheimer
>> Subject: Saving/Restoring IA32_TSC_AUX MSR
>> 
>> 
>> I see the code like (in arch/x86/time.c), and wondering how
>> IA32_TSC_AUX MSR is saved/restored at domain switch time.
>> 
>>     if ( (d->arch.tsc_mode ==  TSC_MODE_PVRDTSCP) &&
>>          boot_cpu_has(X86_FEATURE_RDTSCP) )
>>         write_rdtscp_aux(d->arch.incarnation);
>> 
>> BTW,
>> 
>> include/asm-x86/msr.h
>> #define write_rdtscp_aux(val) wrmsr(0xc0000103, (val), 0)
>> 
>> We should write like wrmsr(MSR_TSC_AUX, (val), 0) by adding
>> +#define MSR_TSC_AUX         0xc0000103 /* Auxiliary TSC */
>> in include/asm-x86/msr-index.h
>> 
>> Thanks,
>> Jun
>> ---
>> Intel Open Source Technology Center
>> 
>>

Jun
___
Intel Open Source Technology Center




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