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Re: [Xen-devel] [PATCH] mask cpuid TSC invariant bit for various circums
| To: | Dan Magenheimer <dan.magenheimer@xxxxxxxxxx>, "Xen-Devel (E-mail)" <xen-devel@xxxxxxxxxxxxxxxxxxx> |
|---|---|
| Subject: | Re: [Xen-devel] [PATCH] mask cpuid TSC invariant bit for various circumstances (Take 2) |
| From: | Keir Fraser <keir.fraser@xxxxxxxxxxxxx> |
| Date: | Fri, 06 Nov 2009 07:18:09 +0000 |
| Cc: | |
| Delivery-date: | Thu, 05 Nov 2009 23:18:37 -0800 |
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| Thread-topic: | [Xen-devel] [PATCH] mask cpuid TSC invariant bit for various circumstances (Take 2) |
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On 05/11/2009 21:50, "Dan Magenheimer" <dan.magenheimer@xxxxxxxxxx> wrote: > Mask cpuid TSC invariant bit for some circumstances > and expose it for others. On upstream Linux kernels, > non-zero Invariant TSC bit permanently selects TSC > as the clocksource (currently on Intel only). When > these kernels run on Xen, when migration is possible > and TSC is unemulated, this can cause much weirdness. > But exposing non-zero Invariant TSC has performance > advantages so we want to expose it when it is safe. > (Note leaving it exposed/unexposed for dom0 is not an > issue.) I think I pushed you into changing this in a way I like even less. :-) I can live with your original patch, so I'll check that in after all. -- Keir _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel |
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