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Re: [Xen-devel] [PATCH] x86 hvm: freeze PIT/LAPIC timer emulation while
| To: | "Cui, Dexuan" <dexuan.cui@xxxxxxxxx>, Kouya Shimura <kouya@xxxxxxxxxxxxxx> |
|---|---|
| Subject: | Re: [Xen-devel] [PATCH] x86 hvm: freeze PIT/LAPIC timer emulation while its IRQ is masked |
| From: | Keir Fraser <keir.fraser@xxxxxxxxxxxxx> |
| Date: | Wed, 16 Sep 2009 09:20:41 +0100 |
| Cc: | "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx> |
| Delivery-date: | Wed, 16 Sep 2009 01:21:40 -0700 |
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| Thread-topic: | [Xen-devel] [PATCH] x86 hvm: freeze PIT/LAPIC timer emulation while its IRQ is masked |
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On 16/09/2009 09:00, "Cui, Dexuan" <dexuan.cui@xxxxxxxxx> wrote: > Looks the little win doesn't deserve the increased complexity in code. > > BTW, recent Intel CPUs run much faster with respect to VMEntry/VMExit and > VMREAD/VMWRITE, so I don't think the SW optimizatin is appearling here. :-) Makes it more appealing doesn't it? As this path will be a greater proportion of an overall vmexit/vmenter cycle. -- Keir _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel |
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