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[Xen-devel] Re: breakage with c/s 19950

To: "Christoph Egger" <Christoph.Egger@xxxxxxx>
Subject: [Xen-devel] Re: breakage with c/s 19950
From: "Jan Beulich" <JBeulich@xxxxxxxxxx>
Date: Tue, 21 Jul 2009 16:26:20 +0100
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>>> Christoph Egger <Christoph.Egger@xxxxxxx> 21.07.09 16:49 >>>
>In c/s 19950, you disable the GART TLB walk error of the northbridge
>as a workaround for AMD K8 CPUs. The comment says, it happens with IOMMU & 
>3ware & Cerberus.
>
>There's a Linux/Dom0 boot problem with this:
>
>The Linux/Dom0 kernel also has this workaround which leads to a #GP in the 
>guest because in Xen mce.c:mce_wrmsr() returns -1.
>
>The question is, is the workaround really really necessary ?
>IOMMU is not yet on market and if there will be AMD K8 machines with
>an IOMMU is very questionable.

The code has been in Linux for quite some time, and given it relates to K8
*and* disables some GART functionality I'd suppose the IOMMU talked about
here is the old GART one, not the not-yet-on-the-market-one.

>If the workaround is not needed, please remove it from both Linux and Xen.
>If the workaround is valid, then mce.c:mce_wrmsr() needs a special check
>for this workaround to NOT return -1.

I'd rather say this handling is supposed to happen only in the hypervisor,
i.e. Dom0 should not even try to do it (which would, without mce_wrmsr(),
have no effect anyway due to the white-listing of MSRs being writable by
domains).

Jan


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