Re: [Xen-devel] Signalling DomU on TPR write

To:	James Harper <james.harper@xxxxxxxxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject:	Re: [Xen-devel] Signalling DomU on TPR write
From:	Keir Fraser <keir.fraser@xxxxxxxxxxxxx>
Date:	Thu, 01 Jan 2009 09:30:27 +0000
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On 01/01/2009 00:57, "James Harper" <james.harper@xxxxxxxxxxxxxxxx> wrote:

> Obviously a number of iterations will be required before all the
> patching is done, but I don't think that's a problem. Patching would
> occur in the DomU with all processors at HIGH_LEVEL (interrupts
> disabled).
> 
> Does that sound acceptable?

I'd run with AMD's static patch tables and see how far that gets you.
There's no reason to think Microsoft are going to release any further
kernels without the lazy TPR optimisation.

Otherwise something like you suggest should work.

 -- Keir

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Re: [Xen-devel] Signalling DomU on TPR write