On 11/24/2008 9:19:01 AM, Tim Deegan wrote:
> Hi,
>
> At 09:10 -0800 on 24 Nov (1227517847), Nakajima, Jun wrote:
> > Even if the guest wants to read data or execute code, the guest page
> > table may need to be modified for the processor to set the A bit
> > when running with paging enabled. This means NPT or EPT needs to set
> > the W permission for the guest page table pages to avoid VM exits or
> > EPT violation. Depending on the implementation, the A bit may need
> > to be set upfront even if the translation turns to be invalid.
>
> I believe the question is whether, if all the A and D bits were
> already set, an EPT page walk would still fault if it did not have
> write access to the guest pagetable page.
>
> NPT documentation explicitly says that _all_ accesses made by the
> guest-pagetable walker are treated as writes, whether they actually
> write back to the guest pagetable or not.
>
> The EPT docs talk about A/D-bit-setting being treated as a
> read-modify-write operation but don't say what happens if the bit is
> already set.
That's my point, depends on the implementation. Today I believe we avoid such
unnecessary writes to the guest page tables, but that may change in the future.
>
> Cheers,
>
> Tim.
>
> > Thanks,
> > Jun
> > ---
> > Intel Open Source Technology Center
> > From: bo ma [mailto:kyle.ma83@xxxxxxxxx]
> > Sent: Monday, November 24, 2008 1:37 AM
> > To: xen-devel@xxxxxxxxxxxxxxxxxxx
> > Cc: Nakajima, Jun; Xin, Xiaohui
> > Subject: EPT walks for guest page table
> >
> > Hi,
> >
> > I am really confused about NPT walks for guest page table , and
> > eager to know the details about it. It is treated as data writes
> > even if the access itself is a code read in AMD NPT.I just want to
> > know : is it the same in EPT?
> >
> > Could anyone help me? I would like to know that very much Thank you
> > in advance
> >
> > Bo Ma
>
> > _______________________________________________
> > Xen-devel mailing list
> > Xen-devel@xxxxxxxxxxxxxxxxxxx
> > http://lists.xensource.com/xen-devel
>
> --
> Tim Deegan <Tim.Deegan@xxxxxxxxxx>
> Principal Software Engineer, Citrix Systems (R&D) Ltd.
> [Company #02300071, SL9 0DZ, UK.]
.
Jun Nakajima | Intel Open Source Technology Center
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