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xen-devel
Re: [Xen-devel] [PATCH][RFC]Move PCI Configuration Spaces from Dom0 to X
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To: |
"Haitao Shan" <maillists.shan@xxxxxxxxx> |
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Subject: |
Re: [Xen-devel] [PATCH][RFC]Move PCI Configuration Spaces from Dom0 to Xen |
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From: |
Espen Skoglund <espen.skoglund@xxxxxxxxxxxxx> |
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Date: |
Thu, 10 Apr 2008 17:54:59 +0100 |
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Cc: |
"Tian, Kevin" <kevin.tian@xxxxxxxxx>, xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxx>, "Shan, Haitao" <haitao.shan@xxxxxxxxx>, "Jiang, Yunhong" <yunhong.jiang@xxxxxxxxx>, "Kay, Allen M" <allen.m.kay@xxxxxxxxx>, Keir Fraser <keir.fraser@xxxxxxxxxxxxx>, "Han, Weidong" <weidong.han@xxxxxxxxx> |
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Delivery-date: |
Thu, 10 Apr 2008 09:55:53 -0700 |
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<481ad8630804100459q1d7cae11o2ea089dfe306d080@xxxxxxxxxxxxxx> |
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I believe dword writes to 0xCF8 should always be latched into the
internal shadow register, irrespective of whether the enable bit (bit
31) is set. Accesseses to 0xCFC can then safely be skipped if enable
bit in latch register is not set.
eSk
[Haitao Shan]
> Thanks, Keir!
> 2008/4/10, Keir Fraser <keir.fraser@xxxxxxxxxxxxx>:
>>
>> On 10/4/08 10:45, "Shan, Haitao" <haitao.shan@xxxxxxxxx> wrote:
>>
>> This patch will move reading and writing of PCI configuration
>> spaces from dom0 to Xen. It also changes VTD code, so that they can
>> touch the PCI configuration spaces with proper lock.
>>
>> This will also benefit MSI support in Xen.
>> Can you give some comments? Thanks!
>>
>>
>> The approach is fine. I will read it more thoroughly, clean it up a bit if
>> necessary, and certainly check it in.
>>
>> -- Keir
>>
>> _______________________________________________
>> Xen-devel mailing list
>> Xen-devel@xxxxxxxxxxxxxxxxxxx
>> http://lists.xensource.com/xen-devel
>>
>>
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