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RE: [Xen-devel] NMI delivery not correctly working

To: "Keir Fraser" <keir@xxxxxxxxxxxxx>, "Christoph Egger" <Christoph.Egger@xxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: RE: [Xen-devel] NMI delivery not correctly working
From: "Kaushik Barde" <Kaushik_Barde@xxxxxxxxxxx>
Date: Tue, 24 Jul 2007 23:43:41 -0700
Delivery-date: Tue, 24 Jul 2007 23:45:53 -0700
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Thread-topic: [Xen-devel] NMI delivery not correctly working
Thanks. 
 
>>
via masking of maskable interrupts
<<
What I'd meant there was all other interrupts are masked (by processor during 
NMI handling) except for NMI.
 
-Kaushik

________________________________

From: Keir Fraser [mailto:keir@xxxxxxxxxxxxx]
Sent: Tue 7/24/2007 11:22 PM
To: Kaushik Barde; Christoph Egger; xen-devel@xxxxxxxxxxxxxxxxxxx
Subject: Re: [Xen-devel] NMI delivery not correctly working



On 24/7/07 19:26, "Kaushik Barde" <Kaushik_Barde@xxxxxxxxxxx> wrote:

> Processor disables calls to subsequent NMIs till it receives next IRET
> instruction

Yes.

> (via masking of maskable interrupts).

No, since NMIs are, of course, not maskable by conventional means.

> I guess, what I am not clear about is how a fully-virtualized guest
> whould issue a IRET hypercall?

It's used just like any other hypercall. Guest jumps at the correct offset
into its hypercall transfer page.

 -- Keir

> -Kaushik
>
> -----Original Message-----
> From: xen-devel-bounces@xxxxxxxxxxxxxxxxxxx
> [mailto:xen-devel-bounces@xxxxxxxxxxxxxxxxxxx] On Behalf Of Keir Fraser
> Sent: Tuesday, July 24, 2007 10:08 AM
> To: Christoph Egger; xen-devel@xxxxxxxxxxxxxxxxxxx
> Subject: Re: [Xen-devel] NMI delivery not correctly working
>
> On 24/7/07 16:47, "Christoph Egger" <Christoph.Egger@xxxxxxx> wrote:
>
>> I know, there is a line "current->nmi_masked = 0;" in do_iret() in
>> xen/arch/x86/x86_(32|64)/traps.c, but this is actually never called
>> after NMI delivery.
>
> Guests *must* use the iret hypercall when returning from their NMI
> handler.
> This is giving a virtualised equivalent of the 'NMI-blocking' latch
> implemented in x86 processors, which is reset by the IRET instruction.
>
>  -- Keir
>
>
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