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Re: [Xen-devel] [PATCH] x86/PAE partially linear page table support

To: Jan Beulich <jbeulich@xxxxxxxxxx>, Keir Fraser <keir@xxxxxxxxxxxxx>
Subject: Re: [Xen-devel] [PATCH] x86/PAE partially linear page table support
From: Keir Fraser <keir@xxxxxxxxxxxxx>
Date: Thu, 15 Feb 2007 13:24:07 +0000
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On 15/2/07 13:08, "Jan Beulich" <jbeulich@xxxxxxxxxx> wrote:

> Hmm, it would seem to me that while it may not easily generalize, it at least
> properly extends to the case the patch tries to address, by exchanging
> PGT_base_page_table against PGT_l2_page_table. Really, in current code
> this can never happen for PGT_base_page_table in PAE (or compat mode
> guests), as such references aren't being established anywhere, and hence
> the code should be dead for such guests.

You can't zap an L2 when there could be L3s later in the list that still
reference that L2.

> But even for the general case - wouldn't it be possible to call
> relinquish_memory() CONFIG_PAGING_LEVELS-1 times, each time lowering
> the level of page tables that can be forced invalid by one?

Yeah, this would work. Seems acceptable.

 -- Keir


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