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[Xen-devel] A question about PIT platform timer

To: "Keir Fraser" <Keir.Fraser@xxxxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: [Xen-devel] A question about PIT platform timer
From: "Tian, Kevin" <kevin.tian@xxxxxxxxx>
Date: Mon, 11 Dec 2006 17:05:51 +0800
Delivery-date: Mon, 11 Dec 2006 01:05:54 -0800
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Thread-topic: A question about PIT platform timer
Just note that pit_read_counter is implemented on top of CH2 of PIT, 
which is known as mode 0 to calibrate TSC earlier. However I see no 
place to re-initialize it again and it's used as the source of platform 
timer count (when using_pit==1) immediately. It seems like weird 
usage since mode0 channel will fall into a loop starting counting down 
from 0xFFFF forever if nobody re-latches it again, which indicates a 
18.2065 Hz source while platform_timer_scale is set as CLOCK_TICK_RATE.

Seems ch0 is what's really wanted... Is it a typo, or any special usage 
on ch2?

Thanks,
Kevin

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