Re: [Xen-devel] Writing MSRs from Domain0

[Keir Fraser <Keir.Fraser@xxxxxxxxxxxx>]

On 6/10/06 13:23, "Holger Steinhaus" <hsteinhaus@xxxxxx> wrote:

>> Add the powernow MSRs to the white list (a switch statement ;-) in
>> emulate_privileged_op in xen/arch/x86/traps.c. This will allow the write to
>> succeed. Ensure you have a 1:1 correspondence between virtual CPUs and
>> physical CPUs for domain 0 (i.e., VCPU0 pinned to PPU0, etc). Cross your
>> fingers. :-)
>>   
> Thanks, thats the solution for my problem.
> 
> Unfortunately, Xen now runs into timer trouble, if the frequency
> switches ("Time went backwards"). This problem seems to be caused by the
> PIT timer, as the recommended HPET timer is not supported by my hardware.

Yeah, someone posted a patch some time ago to work out what frequency is
being switched to when the MSRs are written. A better way will be to add a
frequency-change notification interface so that dom0 can tell Xen when it is
doing frequency scaling. It's good to hear that it seems to working apart
from this detail. :-)

 -- Keir



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