Re: [Xen-devel] 32bit/PAE guest on 64bit hypervisor work

["Jan Beulich" <jbeulich@xxxxxxxxxx>]

>>> context switch entries 3,4,5,6 of the GDT. In fact entry 3 can perhaps stay
>>> as ring-1 code, and we only need to switch entries 4,5,6.
>> 
>> Hmm, that would mean per-CPU GDTs. I'm right now creating a second GDT,
>> and map into the guest's page tables the appropriate one. On a context
>> switch, the most that should be needed on top of what's done today then is
>> to flush the one page from the TLB (I didn't check that, but I suppose it's
>> a global translation).
>
>Per-CPU GDTs would be perfectly acceptable (it's only an extra page per
>CPU). But I suppose since we switch pagetables anyway on the ctxt switch
>path we may as well just have the appropriate ones mapped in each pagetable,
>and remove use of the global bit for that mapping.

Hmm, why flush the entry on systems where compatibility mode isn't used. I'd
rather keep the global flag and make the flush explicit, but conditional upon
old and new vcpu's domain having different compatibility mode settings.

Jan

_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-devel