[Xen-devel] [PATCH] Fixing booting problem on machine with >4GB memory

["Nakajima, Jun" <jun.nakajima@xxxxxxxxx>]

This patch fixes the booting problems on machines with >4GB memory, and
is applicable to both x86_64 and x86 PAE.

"pte &= ~_PAGE_RW;" was cutting off the higher bits in the pte.

Signed-off-by: Jun Nakajima <jun.nakajima@xxxxxxxxx>

diff -r 058e8087d36a xen/arch/x86/mm.c
--- a/xen/arch/x86/mm.c Sat Aug 13 09:06:44 2005
+++ b/xen/arch/x86/mm.c Sat Aug 13 11:09:46 2005
@@ -2902,8 +2902,8 @@
 /* Flush the given writable p.t. page and write-protect it again. */
 void ptwr_flush(struct domain *d, const int which)
 {
-    unsigned long  pte, *ptep, l1va;
-    l1_pgentry_t  *pl1e;
+    unsigned long l1va;
+    l1_pgentry_t  *pl1e, pte, *ptep;
     l2_pgentry_t  *pl2e;
     unsigned int   modified;
 
@@ -2923,13 +2923,13 @@
         TOGGLE_MODE();
 
     l1va = d->arch.ptwr[which].l1va;
-    ptep = (unsigned long *)&linear_pg_table[l1_linear_offset(l1va)];
+    ptep = (l1_pgentry_t *)&linear_pg_table[l1_linear_offset(l1va)];
 
     /*
      * STEP 1. Write-protect the p.t. page so no more updates can
occur.
      */
 
-    if ( unlikely(__get_user(pte, ptep)) )
+    if ( unlikely(__get_user(pte.l1, &ptep->l1)) )
     {
         MEM_LOG("ptwr: Could not read pte at %p", ptep);
         /*
@@ -2940,7 +2940,7 @@
     }
     PTWR_PRINTK("[%c] disconnected_l1va at %p is %lx\n",
                 PTWR_PRINT_WHICH, ptep, pte);
-    pte &= ~_PAGE_RW;
+    l1e_remove_flags(pte, _PAGE_RW);
 
     /* Write-protect the p.t. page in the guest page table. */
     if ( unlikely(__put_user(pte, ptep)) )

Jun
---
Intel Open Source Technology Center

4gb.patch
Description: 4gb.patch

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