# HG changeset patch
# User George Dunlap <george.dunlap@xxxxxxxxxxxxx>
# Date 1311701818 -3600
# Node ID ef9ed3d2aa870a37ed5e611be9c524d526a2d604
# Parent 590aadf7c46ae979da3552332f592f9492ce6d8b
xen: Infrastructure to allow irqs to share vector maps
Laying the groundwork for per-device vector maps. This generic
code allows any irq to point to a vector map; all irqs sharing the
same vector map will avoid sharing vectors.
Signed-off-by: George Dunlap <george.dunlap@xxxxxxxxxxxxx>
---
diff -r 590aadf7c46a -r ef9ed3d2aa87 xen/arch/x86/io_apic.c
--- a/xen/arch/x86/io_apic.c Tue Jul 26 17:00:25 2011 +0100
+++ b/xen/arch/x86/io_apic.c Tue Jul 26 18:36:58 2011 +0100
@@ -449,6 +449,11 @@
irq, vector, smp_processor_id());
__get_cpu_var(vector_irq)[vector] = -1;
+ if ( cfg->used_vectors )
+ {
+ ASSERT(test_bit(vector, cfg->used_vectors));
+ clear_bit(vector, cfg->used_vectors);
+ }
cfg->move_cleanup_count--;
unlock:
spin_unlock(&desc->lock);
diff -r 590aadf7c46a -r ef9ed3d2aa87 xen/arch/x86/irq.c
--- a/xen/arch/x86/irq.c Tue Jul 26 17:00:25 2011 +0100
+++ b/xen/arch/x86/irq.c Tue Jul 26 18:36:58 2011 +0100
@@ -108,6 +108,8 @@
per_cpu(vector_irq, cpu)[vector] = irq;
cfg->vector = vector;
cfg->cpu_mask = online_mask;
+ if ( cfg->used_vectors )
+ set_bit(vector, cfg->used_vectors);
irq_status[irq] = IRQ_USED;
if (IO_APIC_IRQ(irq))
irq_vector[irq] = vector;
@@ -172,6 +174,7 @@
desc->depth = 1;
desc->msi_desc = NULL;
desc->handler = &no_irq_type;
+ desc->chip_data->used_vectors=NULL;
cpus_setall(desc->affinity);
spin_unlock_irqrestore(&desc->lock, flags);
@@ -200,6 +203,9 @@
for_each_cpu_mask(cpu, tmp_mask)
per_cpu(vector_irq, cpu)[vector] = -1;
+ if ( cfg->used_vectors )
+ clear_bit(vector, cfg->used_vectors);
+
cfg->vector = IRQ_VECTOR_UNASSIGNED;
cpus_clear(cfg->cpu_mask);
init_one_irq_status(irq);
@@ -277,6 +283,7 @@
cfg->vector = IRQ_VECTOR_UNASSIGNED;
cpus_clear(cfg->cpu_mask);
cpus_clear(cfg->old_cpu_mask);
+ cfg->used_vectors = NULL;
}
int __init init_irq_data(void)
@@ -402,6 +409,10 @@
if (test_bit(vector, used_vectors))
goto next;
+ if (cfg->used_vectors
+ && test_bit(vector, cfg->used_vectors) )
+ goto next;
+
for_each_cpu_mask(new_cpu, tmp_mask)
if (per_cpu(vector_irq, new_cpu)[vector] != -1)
goto next;
@@ -417,6 +428,11 @@
per_cpu(vector_irq, new_cpu)[vector] = irq;
cfg->vector = vector;
cpus_copy(cfg->cpu_mask, tmp_mask);
+ if ( cfg->used_vectors )
+ {
+ ASSERT(!test_bit(vector, cfg->used_vectors));
+ set_bit(vector, cfg->used_vectors);
+ }
irq_status[irq] = IRQ_USED;
if (IO_APIC_IRQ(irq))
diff -r 590aadf7c46a -r ef9ed3d2aa87 xen/include/asm-x86/irq.h
--- a/xen/include/asm-x86/irq.h Tue Jul 26 17:00:25 2011 +0100
+++ b/xen/include/asm-x86/irq.h Tue Jul 26 18:36:58 2011 +0100
@@ -24,11 +24,16 @@
#define irq_to_desc(irq) (&irq_desc[irq])
#define irq_cfg(irq) (&irq_cfg[irq])
+typedef struct {
+ DECLARE_BITMAP(_bits,NR_VECTORS);
+} vmask_t;
+
struct irq_cfg {
int vector;
cpumask_t cpu_mask;
cpumask_t old_cpu_mask;
unsigned move_cleanup_count;
+ vmask_t *used_vectors;
u8 move_in_progress : 1;
};
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