[Xen-changelog] [xen-unstable] x86: Remove timeouts from INIT-SIPI-SIPI sequence when using x2apic.

[Xen patchbot-unstable <patchbot@xxxxxxx>]

# HG changeset patch
# User Tim Deegan <Tim.Deegan@xxxxxxxxxx>
# Date 1311081181 -3600
# Node ID b3434f24b0827c5ef34e4b4a72893288e2ffbe40
# Parent  18653a163b1e8e10b4353272bcb9e8302bfd2e19
x86: Remove timeouts from INIT-SIPI-SIPI sequence when using x2apic.

Some of the timeouts are pointless since they're waiting for the ICR
to ack the IPI delivery and that doesn't happen on x2apic.
The others should be benign (and are suggested in the SDM) but
removing them makes AP bringup much more reliable on some test boxes.

Signed-off-by: Tim Deegan <Tim.Deegan@xxxxxxxxxx>
---


diff -r 18653a163b1e -r b3434f24b082 xen/arch/x86/smpboot.c
--- a/xen/arch/x86/smpboot.c    Tue Jul 19 14:10:53 2011 +0100
+++ b/xen/arch/x86/smpboot.c    Tue Jul 19 14:13:01 2011 +0100
@@ -436,29 +436,30 @@
     apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
                    phys_apicid);
 
-    Dprintk("Waiting for send to finish...\n");
-    timeout = 0;
-    do {
-        Dprintk("+");
-        udelay(100);
-        if ( !x2apic_enabled )
+    if ( !x2apic_enabled )
+    {
+        Dprintk("Waiting for send to finish...\n");
+        timeout = 0;
+        do {
+            Dprintk("+");
+            udelay(100);
             send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
-    } while ( send_status && (timeout++ < 1000) );
+        } while ( send_status && (timeout++ < 1000) );
 
-    mdelay(10);
+        mdelay(10);
 
-    Dprintk("Deasserting INIT.\n");
+        Dprintk("Deasserting INIT.\n");
 
-    apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
+        apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
 
-    Dprintk("Waiting for send to finish...\n");
-    timeout = 0;
-    do {
-        Dprintk("+");
-        udelay(100);
-        if ( !x2apic_enabled )
+        Dprintk("Waiting for send to finish...\n");
+        timeout = 0;
+        do {
+            Dprintk("+");
+            udelay(100);
             send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
-    } while ( send_status && (timeout++ < 1000) );
+        } while ( send_status && (timeout++ < 1000) );
+    }
 
     /*
      * Should we send STARTUP IPIs ?
@@ -487,22 +488,24 @@
          */
         apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12), phys_apicid);
 
-        /* Give the other CPU some time to accept the IPI. */
-        udelay(300);
+        if ( !x2apic_enabled )
+        {
+            /* Give the other CPU some time to accept the IPI. */
+            udelay(300);
 
-        Dprintk("Startup point 1.\n");
+            Dprintk("Startup point 1.\n");
 
-        Dprintk("Waiting for send to finish...\n");
-        timeout = 0;
-        do {
-            Dprintk("+");
-            udelay(100);
-            if ( !x2apic_enabled )
-            send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
-        } while ( send_status && (timeout++ < 1000) );
+            Dprintk("Waiting for send to finish...\n");
+            timeout = 0;
+            do {
+                Dprintk("+");
+                udelay(100);
+                send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
+            } while ( send_status && (timeout++ < 1000) );
 
-        /* Give the other CPU some time to accept the IPI. */
-        udelay(200);
+            /* Give the other CPU some time to accept the IPI. */
+            udelay(200);
+        }
 
         /* Due to the Pentium erratum 3AP. */
         if ( maxlvt > 3 )

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