# HG changeset patch
# User Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
# Date 1308052920 -3600
# Node ID d04608ad70f8d119a4e06114b1819880af7c51c3
# Parent 595a0c0804a93cfdc1f21623d0ee7d0e9d12d210
x86/apic: record local APIC state on boot
Xen does not store the boot local APIC state which leads to problems
when shutting down for a kexec jump. This patch records the boot
state so we can return to the boot state when kexecing.
Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Signed-off-by: Keir Fraser <keir@xxxxxxx>
Acked-by: Jan Beulich <jbeulich@xxxxxxxxxx>
---
diff -r 595a0c0804a9 -r d04608ad70f8 xen/arch/x86/apic.c
--- a/xen/arch/x86/apic.c Tue Jun 14 12:49:41 2011 +0100
+++ b/xen/arch/x86/apic.c Tue Jun 14 13:02:00 2011 +0100
@@ -74,6 +74,12 @@
static bool_t __initdata opt_x2apic = 1;
boolean_param("x2apic", opt_x2apic);
+/*
+ * Bootstrap processor local APIC boot mode - so we can undo our changes
+ * to the APIC state.
+ */
+static enum apic_mode apic_boot_mode = APIC_MODE_INVALID;
+
bool_t __read_mostly x2apic_enabled = 0;
bool_t __read_mostly directed_eoi_enabled = 0;
@@ -1438,6 +1444,62 @@
return 0;
}
+static const char * __init apic_mode_to_str(const enum apic_mode mode)
+{
+ switch ( mode )
+ {
+ case APIC_MODE_INVALID:
+ return "invalid";
+ case APIC_MODE_DISABLED:
+ return "disabled";
+ case APIC_MODE_XAPIC:
+ return "xapic";
+ case APIC_MODE_X2APIC:
+ return "x2apic";
+ default:
+ return "unrecognised";
+ }
+}
+
+/* Needs to be called during startup. It records the state the BIOS
+ * leaves the local APIC so we can undo upon kexec.
+ */
+void __init record_boot_APIC_mode(void)
+{
+ /* Sanity check - we should only ever run once, but could possibly
+ * be called several times */
+ if ( APIC_MODE_INVALID != apic_boot_mode )
+ return;
+
+ apic_boot_mode = current_local_apic_mode();
+
+ apic_printk(APIC_DEBUG, "APIC boot state is '%s'\n",
+ apic_mode_to_str(apic_boot_mode));
+}
+
+/* Look at the bits in MSR_IA32_APICBASE and work out which
+ * APIC mode we are in */
+enum apic_mode current_local_apic_mode(void)
+{
+ u64 msr_contents;
+
+ rdmsrl(MSR_IA32_APICBASE, msr_contents);
+
+ /* Reading EXTD bit from the MSR is only valid if CPUID
+ * says so, else reserved */
+ if ( cpu_has(¤t_cpu_data, X86_FEATURE_X2APIC)
+ && (msr_contents & MSR_IA32_APICBASE_EXTD) )
+ return APIC_MODE_X2APIC;
+
+ /* EN bit should always be valid as long as we can read the MSR
+ */
+ if ( msr_contents & MSR_IA32_APICBASE_ENABLE )
+ return APIC_MODE_XAPIC;
+
+ return APIC_MODE_DISABLED;
+}
+
+
void check_for_unexpected_msi(unsigned int vector)
{
unsigned long v = apic_read(APIC_ISR + ((vector & ~0x1f) >> 1));
diff -r 595a0c0804a9 -r d04608ad70f8 xen/arch/x86/genapic/probe.c
--- a/xen/arch/x86/genapic/probe.c Tue Jun 14 12:49:41 2011 +0100
+++ b/xen/arch/x86/genapic/probe.c Tue Jun 14 13:02:00 2011 +0100
@@ -60,6 +60,8 @@
{
int i, changed;
+ record_boot_APIC_mode();
+
check_x2apic_preenabled();
cmdline_apic = changed = (genapic != NULL);
diff -r 595a0c0804a9 -r d04608ad70f8 xen/include/asm-x86/apic.h
--- a/xen/include/asm-x86/apic.h Tue Jun 14 12:49:41 2011 +0100
+++ b/xen/include/asm-x86/apic.h Tue Jun 14 13:02:00 2011 +0100
@@ -21,6 +21,14 @@
#define IO_APIC_REDIR_DEST_LOGICAL 0x00800
#define IO_APIC_REDIR_DEST_PHYSICAL 0x00000
+/* Possible APIC states */
+enum apic_mode {
+ APIC_MODE_INVALID, /* Not set yet */
+ APIC_MODE_DISABLED, /* If uniprocessor, or MP in uniprocessor mode */
+ APIC_MODE_XAPIC, /* xAPIC mode - default upon chipset reset */
+ APIC_MODE_X2APIC /* x2APIC mode - common for large MP machines */
+};
+
extern u8 apic_verbosity;
extern bool_t x2apic_enabled;
extern bool_t directed_eoi_enabled;
@@ -203,6 +211,8 @@
extern void enable_APIC_timer(void);
extern int lapic_suspend(void);
extern int lapic_resume(void);
+extern void record_boot_APIC_mode(void);
+extern enum apic_mode current_local_apic_mode(void);
extern int check_nmi_watchdog (void);
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