[Xen-changelog] [xen-4.1-testing] x86_emulate: FPU 0xda instructions have a 32-bit memory operand, not 64-bit.

[Xen patchbot-4.1-testing <patchbot@xxxxxxx>]

# HG changeset patch
# User Keir Fraser <keir@xxxxxxx>
# Date 1299601141 0
# Node ID a378fbfa7219f87f953a8368f78db66d2c88a85a
# Parent  961262d35ceda9adbda6913f0fe86c21d3b69673
x86_emulate: FPU 0xda instructions have a 32-bit memory operand, not 64-bit.

Signed-off-by: Keir Fraser <keir@xxxxxxx>
xen-unstable changeset:   22993:22eb31eb688a
xen-unstable date:        Tue Mar 08 16:14:55 2011 +0000
---


diff -r 961262d35ced -r a378fbfa7219 xen/arch/x86/x86_emulate/x86_emulate.c
--- a/xen/arch/x86/x86_emulate/x86_emulate.c    Tue Mar 08 16:18:49 2011 +0000
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c    Tue Mar 08 16:19:01 2011 +0000
@@ -2667,35 +2667,35 @@
             break;
         default:
             fail_if(modrm >= 0xc0);
-            ea.bytes = 8;
+            ea.bytes = 4;
             src = ea;
             if ( (rc = ops->read(src.mem.seg, src.mem.off, &src.val,
                                  src.bytes, ctxt)) != 0 )
                 goto done;
             switch ( modrm_reg & 7 )
             {
-            case 0: /* fiadd m64i */
+            case 0: /* fiadd m32i */
                 emulate_fpu_insn_memsrc("fiaddl", src.val);
                 break;
-            case 1: /* fimul m64i */
+            case 1: /* fimul m32i */
                 emulate_fpu_insn_memsrc("fimull", src.val);
                 break;
-            case 2: /* ficom m64i */
+            case 2: /* ficom m32i */
                 emulate_fpu_insn_memsrc("ficoml", src.val);
                 break;
-            case 3: /* ficomp m64i */
+            case 3: /* ficomp m32i */
                 emulate_fpu_insn_memsrc("ficompl", src.val);
                 break;
-            case 4: /* fisub m64i */
+            case 4: /* fisub m32i */
                 emulate_fpu_insn_memsrc("fisubl", src.val);
                 break;
-            case 5: /* fisubr m64i */
+            case 5: /* fisubr m32i */
                 emulate_fpu_insn_memsrc("fisubrl", src.val);
                 break;
-            case 6: /* fidiv m64i */
+            case 6: /* fidiv m32i */
                 emulate_fpu_insn_memsrc("fidivl", src.val);
                 break;
-            case 7: /* fidivr m64i */
+            case 7: /* fidivr m32i */
                 emulate_fpu_insn_memsrc("fidivrl", src.val);
                 break;
             default:

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