# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1280917268 -3600
# Node ID 4566d523b10a1016643f4823a6c2de2068973627
# Parent 38aee6139719686ae2f98e4e7a6a71a0c674a25d
x86 hvm: Fix MSR xentrace output.
Signed-off-by: Christoph Egger <Christoph.Egger@xxxxxxx>
Signed-off-by: Keir Fraser <keir.fraser@xxxxxxxxxx>
---
xen/arch/x86/hvm/hvm.c | 60 +++++++++++++++++++++++----------------------
xen/arch/x86/hvm/svm/svm.c | 5 ---
xen/arch/x86/hvm/vmx/vmx.c | 5 ---
3 files changed, 31 insertions(+), 39 deletions(-)
diff -r 38aee6139719 -r 4566d523b10a xen/arch/x86/hvm/hvm.c
--- a/xen/arch/x86/hvm/hvm.c Tue Aug 03 21:03:09 2010 +0100
+++ b/xen/arch/x86/hvm/hvm.c Wed Aug 04 11:21:08 2010 +0100
@@ -2021,7 +2021,7 @@ int hvm_msr_read_intercept(unsigned int
uint64_t *var_range_base, *fixed_range_base;
int index, mtrr;
uint32_t cpuid[4];
- int ret;
+ int ret = X86EMUL_OKAY;
var_range_base = (uint64_t *)v->arch.hvm_vcpu.mtrr.var_ranges;
fixed_range_base = (uint64_t *)v->arch.hvm_vcpu.mtrr.fixed_ranges;
@@ -2094,24 +2094,25 @@ int hvm_msr_read_intercept(unsigned int
break;
default:
- ret = vmce_rdmsr(msr, msr_content);
- if ( ret < 0 )
+ if ( (ret = vmce_rdmsr(msr, msr_content)) < 0 )
goto gp_fault;
- else if ( ret )
- break;
- /* ret == 0, This is not an MCE MSR, see other MSRs */
- else if (!ret) {
- return hvm_funcs.msr_read_intercept(msr, msr_content);
- }
- }
-
- HVMTRACE_3D(MSR_READ, (uint32_t)*msr_content, (uint32_t)(*msr_content >>
32), msr);
-
- return X86EMUL_OKAY;
-
-gp_fault:
+ /* If ret == 0 then this is not an MCE MSR, see other MSRs. */
+ ret = ((ret == 0)
+ ? hvm_funcs.msr_read_intercept(msr, msr_content)
+ : X86EMUL_OKAY);
+ break;
+ }
+
+ out:
+ HVMTRACE_3D(MSR_READ, msr,
+ (uint32_t)*msr_content, (uint32_t)(*msr_content >> 32));
+ return ret;
+
+ gp_fault:
hvm_inject_exception(TRAP_gp_fault, 0, 0);
- return X86EMUL_EXCEPTION;
+ ret = X86EMUL_EXCEPTION;
+ *msr_content = -1ull;
+ goto out;
}
int hvm_msr_write_intercept(unsigned int msr, uint64_t msr_content)
@@ -2119,9 +2120,10 @@ int hvm_msr_write_intercept(unsigned int
struct vcpu *v = current;
int index, mtrr;
uint32_t cpuid[4];
- int ret;
-
- HVMTRACE_3D(MSR_WRITE, (uint32_t)msr_content, (uint32_t)(msr_content >>
32), msr);
+ int ret = X86EMUL_OKAY;
+
+ HVMTRACE_3D(MSR_WRITE, msr,
+ (uint32_t)msr_content, (uint32_t)(msr_content >> 32));
hvm_cpuid(1, &cpuid[0], &cpuid[1], &cpuid[2], &cpuid[3]);
mtrr = !!(cpuid[3] & bitmaskof(X86_FEATURE_MTRR));
@@ -2194,16 +2196,16 @@ int hvm_msr_write_intercept(unsigned int
break;
default:
- ret = vmce_wrmsr(msr, msr_content);
- if ( ret < 0 )
+ if ( (ret = vmce_wrmsr(msr, msr_content)) < 0 )
goto gp_fault;
- else if ( ret )
- break;
- else if (!ret)
- return hvm_funcs.msr_write_intercept(msr, msr_content);
- }
-
- return X86EMUL_OKAY;
+ /* If ret == 0 then this is not an MCE MSR, see other MSRs. */
+ ret = ((ret == 0)
+ ? hvm_funcs.msr_write_intercept(msr, msr_content)
+ : X86EMUL_OKAY);
+ break;
+ }
+
+ return ret;
gp_fault:
hvm_inject_exception(TRAP_gp_fault, 0, 0);
diff -r 38aee6139719 -r 4566d523b10a xen/arch/x86/hvm/svm/svm.c
--- a/xen/arch/x86/hvm/svm/svm.c Tue Aug 03 21:03:09 2010 +0100
+++ b/xen/arch/x86/hvm/svm/svm.c Wed Aug 04 11:21:08 2010 +0100
@@ -1117,8 +1117,6 @@ static int svm_msr_read_intercept(unsign
goto gpf;
}
- HVMTRACE_3D (MSR_READ, msr,
- (uint32_t)*msr_content, (uint32_t)(*msr_content>>32));
HVM_DBG_LOG(DBG_LEVEL_1, "returns: ecx=%x, msr_value=%"PRIx64,
msr, *msr_content);
return X86EMUL_OKAY;
@@ -1132,9 +1130,6 @@ static int svm_msr_write_intercept(unsig
{
struct vcpu *v = current;
struct vmcb_struct *vmcb = v->arch.hvm_svm.vmcb;
-
- HVMTRACE_3D(MSR_WRITE, msr,
- (uint32_t)msr_content, (uint32_t)(msr_content >> 32));
switch ( msr )
{
diff -r 38aee6139719 -r 4566d523b10a xen/arch/x86/hvm/vmx/vmx.c
--- a/xen/arch/x86/hvm/vmx/vmx.c Tue Aug 03 21:03:09 2010 +0100
+++ b/xen/arch/x86/hvm/vmx/vmx.c Wed Aug 04 11:21:08 2010 +0100
@@ -1872,8 +1872,6 @@ static int vmx_msr_read_intercept(unsign
}
done:
- HVMTRACE_3D(MSR_READ, msr,
- (uint32_t)*msr_content, (uint32_t)(*msr_content >> 32));
HVM_DBG_LOG(DBG_LEVEL_1, "returns: ecx=%x, msr_value=0x%"PRIx64,
msr, *msr_content);
return X86EMUL_OKAY;
@@ -1949,9 +1947,6 @@ static int vmx_msr_write_intercept(unsig
HVM_DBG_LOG(DBG_LEVEL_1, "ecx=%x, msr_value=0x%"PRIx64,
msr, msr_content);
-
- HVMTRACE_3D(MSR_WRITE, msr,
- (uint32_t)msr_content, (uint32_t)(msr_content >> 32));
switch ( msr )
{
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