# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1275030182 -3600
# Node ID 500354a67a73b238c15dee313c31a1706bc4a116
# Parent 26c2922da53cb2b36ef9484bbd6d74ea74b1c354
x86: Warn on CPU hot-add to tsc-reliable system
...and provide a boot option to indicate TSCs may be skewed.
Signed-off-by: Keir Fraser <keir.fraser@xxxxxxxxxx>
---
xen/arch/x86/setup.c | 12 ------------
xen/arch/x86/smpboot.c | 12 +++++++++++-
xen/arch/x86/time.c | 21 ++++++++++++++++++++-
3 files changed, 31 insertions(+), 14 deletions(-)
diff -r 26c2922da53c -r 500354a67a73 xen/arch/x86/setup.c
--- a/xen/arch/x86/setup.c Thu May 27 09:39:47 2010 +0100
+++ b/xen/arch/x86/setup.c Fri May 28 08:03:02 2010 +0100
@@ -69,10 +69,6 @@ static int __initdata opt_watchdog = 0;
static int __initdata opt_watchdog = 0;
boolean_param("watchdog", opt_watchdog);
-/* opt_tsc_unstable: Override all tests; assume TSC is unreliable. */
-static int opt_tsc_unstable;
-boolean_param("tsc_unstable", opt_tsc_unstable);
-
/* **** Linux config option: propagated to domain0. */
/* "acpi=off": Sisables both ACPI table parsing and interpreter. */
/* "acpi=force": Override the disable blacklist. */
@@ -415,14 +411,6 @@ void __init __start_xen(unsigned long mb
while ( kextra[1] == ' ' ) kextra++;
}
cmdline_parse(cmdline);
-
- /* If TSC is marked as unstable, clear all enhanced TSC features. */
- if ( opt_tsc_unstable )
- {
- setup_clear_cpu_cap(X86_FEATURE_CONSTANT_TSC);
- setup_clear_cpu_cap(X86_FEATURE_NONSTOP_TSC);
- setup_clear_cpu_cap(X86_FEATURE_TSC_RELIABLE);
- }
parse_video_info();
diff -r 26c2922da53c -r 500354a67a73 xen/arch/x86/smpboot.c
--- a/xen/arch/x86/smpboot.c Thu May 27 09:39:47 2010 +0100
+++ b/xen/arch/x86/smpboot.c Fri May 28 08:03:02 2010 +0100
@@ -923,7 +923,17 @@ int cpu_add(uint32_t apic_id, uint32_t a
}
/* Physically added CPUs do not have synchronised TSC. */
- cpu_set(cpu, tsc_sync_cpu_mask);
+ if ( boot_cpu_has(X86_FEATURE_TSC_RELIABLE) )
+ {
+ static bool_t once_only;
+ if ( !test_and_set_bool(once_only) )
+ printk(XENLOG_WARNING
+ " ** New physical CPU %u may have skewed TSC and hence "
+ "break assumed cross-CPU TSC coherency.\n"
+ " ** Consider using boot parameter \"tsc=skewed\" "
+ "which forces TSC emulation where appropriate.\n", cpu);
+ cpu_set(cpu, tsc_sync_cpu_mask);
+ }
srat_detect_node(cpu);
numa_add_cpu(cpu);
diff -r 26c2922da53c -r 500354a67a73 xen/arch/x86/time.c
--- a/xen/arch/x86/time.c Thu May 27 09:39:47 2010 +0100
+++ b/xen/arch/x86/time.c Fri May 28 08:03:02 2010 +0100
@@ -1598,6 +1598,25 @@ struct tm wallclock_time(void)
* PV SoftTSC Emulation.
*/
+/*
+ * tsc=unstable: Override all tests; assume TSC is unreliable.
+ * tsc=skewed: Assume TSCs are individually reliable, but skewed across CPUs.
+ */
+static void __init tsc_parse(const char *s)
+{
+ if ( !strcmp(s, "unstable") )
+ {
+ setup_clear_cpu_cap(X86_FEATURE_CONSTANT_TSC);
+ setup_clear_cpu_cap(X86_FEATURE_NONSTOP_TSC);
+ setup_clear_cpu_cap(X86_FEATURE_TSC_RELIABLE);
+ }
+ else if ( !strcmp(s, "skewed") )
+ {
+ setup_clear_cpu_cap(X86_FEATURE_TSC_RELIABLE);
+ }
+}
+custom_param("tsc", tsc_parse);
+
u64 gtime_to_gtsc(struct domain *d, u64 tsc)
{
if ( !is_hvm_domain(d) )
@@ -1636,7 +1655,7 @@ void pv_soft_rdtsc(struct vcpu *v, struc
int host_tsc_is_safe(void)
{
- return boot_cpu_has(X86_FEATURE_TSC_RELIABLE) || (num_online_cpus() == 1);
+ return boot_cpu_has(X86_FEATURE_TSC_RELIABLE);
}
void cpuid_time_leaf(uint32_t sub_idx, uint32_t *eax, uint32_t *ebx,
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