WARNING - OLD ARCHIVES

This is an archived copy of the Xen.org mailing list, which we have preserved to ensure that existing links to archives are not broken. The live archive, which contains the latest emails, can be found at http://lists.xen.org/
   
 
 
Xen 
 
Home Products Support Community News
 
   
 

xen-changelog

[Xen-changelog] [xen-unstable] x86: Enable TSC_RELIABLE for AMD servers

To: xen-changelog@xxxxxxxxxxxxxxxxxxx
Subject: [Xen-changelog] [xen-unstable] x86: Enable TSC_RELIABLE for AMD servers
From: Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>
Date: Fri, 23 Oct 2009 02:40:20 -0700
Delivery-date: Fri, 23 Oct 2009 02:41:50 -0700
Envelope-to: www-data@xxxxxxxxxxxxxxxxxxx
List-help: <mailto:xen-changelog-request@lists.xensource.com?subject=help>
List-id: BK change log <xen-changelog.lists.xensource.com>
List-post: <mailto:xen-changelog@lists.xensource.com>
List-subscribe: <http://lists.xensource.com/mailman/listinfo/xen-changelog>, <mailto:xen-changelog-request@lists.xensource.com?subject=subscribe>
List-unsubscribe: <http://lists.xensource.com/mailman/listinfo/xen-changelog>, <mailto:xen-changelog-request@lists.xensource.com?subject=unsubscribe>
Reply-to: xen-devel@xxxxxxxxxxxxxxxxxxx
Sender: xen-changelog-bounces@xxxxxxxxxxxxxxxxxxx
# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1256289317 -3600
# Node ID 8ca4e32583b6ebaf7208df1bfd9dbc21b917e9a2
# Parent  e36ffdd9e8cf2ce70abcb07e99ad90d8919a2649
x86: Enable TSC_RELIABLE for AMD servers

Except for a published BIOS errata on family 11h processors,
all AMD servers that have the Invariant TSC bit set have
a reliable TSC so Xen should not write to the TSC.

Signed-off-by: Dan Magenheimer <dan.magenheimer@xxxxxxxxxx>
Acked-by: Mark Langsdorf <mark.langsdorf@xxxxxxx>
---
 xen/arch/x86/cpu/amd.c |    2 ++
 1 files changed, 2 insertions(+)

diff -r e36ffdd9e8cf -r 8ca4e32583b6 xen/arch/x86/cpu/amd.c
--- a/xen/arch/x86/cpu/amd.c    Fri Oct 23 10:13:52 2009 +0100
+++ b/xen/arch/x86/cpu/amd.c    Fri Oct 23 10:15:17 2009 +0100
@@ -465,6 +465,8 @@ static void __devinit init_amd(struct cp
                if (c->x86_power & (1<<8)) {
                        set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
                        set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
+                       if (c->x86 != 0x11)
+                               set_bit(X86_FEATURE_TSC_RELIABLE, 
c->x86_capability);
                }
        }
 

_______________________________________________
Xen-changelog mailing list
Xen-changelog@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-changelog

<Prev in Thread] Current Thread [Next in Thread>
  • [Xen-changelog] [xen-unstable] x86: Enable TSC_RELIABLE for AMD servers, Xen patchbot-unstable <=