# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1226403300 0
# Node ID 7be8e7eefbd79e7bb823b20eadfbdd1fec483d93
# Parent 7e8db19d72a54a86034177e2a48f7d2a2af87648
vmx: Clean up exception delivery logic.
Signed-off-by: Keir Fraser <keir.fraser@xxxxxxxxxx>
---
xen/arch/x86/hvm/vmx/intr.c | 4 -
xen/arch/x86/hvm/vmx/vmx.c | 80 ++++++++++++++++++--------------------
xen/arch/x86/hvm/vmx/vpmu_core2.c | 2
xen/include/asm-x86/hvm/vmx/vmx.h | 6 +-
4 files changed, 44 insertions(+), 48 deletions(-)
diff -r 7e8db19d72a5 -r 7be8e7eefbd7 xen/arch/x86/hvm/vmx/intr.c
--- a/xen/arch/x86/hvm/vmx/intr.c Tue Nov 11 11:13:57 2008 +0000
+++ b/xen/arch/x86/hvm/vmx/intr.c Tue Nov 11 11:35:00 2008 +0000
@@ -140,12 +140,12 @@ asmlinkage void vmx_intr_assist(void)
if ( intack.source == hvm_intsrc_nmi )
{
- vmx_inject_nmi(v);
+ vmx_inject_nmi();
}
else
{
HVMTRACE_2D(INJ_VIRQ, intack.vector, /*fake=*/ 0);
- vmx_inject_extint(v, intack.vector);
+ vmx_inject_extint(intack.vector);
pt_intr_post(v, intack);
}
diff -r 7e8db19d72a5 -r 7be8e7eefbd7 xen/arch/x86/hvm/vmx/vmx.c
--- a/xen/arch/x86/hvm/vmx/vmx.c Tue Nov 11 11:13:57 2008 +0000
+++ b/xen/arch/x86/hvm/vmx/vmx.c Tue Nov 11 11:35:00 2008 +0000
@@ -187,7 +187,7 @@ static enum handler_return long_mode_do_
check_long_mode:
if ( !(hvm_long_mode_enabled(v)) )
{
- vmx_inject_hw_exception(v, TRAP_gp_fault, 0);
+ vmx_inject_hw_exception(TRAP_gp_fault, 0);
return HNDL_exception_raised;
}
break;
@@ -284,7 +284,7 @@ static enum handler_return long_mode_do_
uncanonical_address:
HVM_DBG_LOG(DBG_LEVEL_0, "Not cano address of msr write %x", ecx);
gp_fault:
- vmx_inject_hw_exception(v, TRAP_gp_fault, 0);
+ vmx_inject_hw_exception(TRAP_gp_fault, 0);
exception_raised:
return HNDL_exception_raised;
}
@@ -1094,8 +1094,7 @@ void ept_sync_domain(struct domain *d)
}
}
-static void __vmx_inject_exception(
- struct vcpu *v, int trap, int type, int error_code)
+static void __vmx_inject_exception(int trap, int type, int error_code)
{
unsigned long intr_fields;
@@ -1114,15 +1113,9 @@ static void __vmx_inject_exception(
}
__vmwrite(VM_ENTRY_INTR_INFO, intr_fields);
-
- if ( trap == TRAP_page_fault )
- HVMTRACE_LONG_2D(PF_INJECT, error_code,
- TRC_PAR_LONG(v->arch.hvm_vcpu.guest_cr[2]));
- else
- HVMTRACE_2D(INJ_EXC, trap, error_code);
-}
-
-void vmx_inject_hw_exception(struct vcpu *v, int trap, int error_code)
+}
+
+void vmx_inject_hw_exception(int trap, int error_code)
{
unsigned long intr_info = __vmread(VM_ENTRY_INTR_INFO);
@@ -1134,37 +1127,41 @@ void vmx_inject_hw_exception(struct vcpu
error_code = 0;
}
- __vmx_inject_exception(v, trap, X86_EVENTTYPE_HW_EXCEPTION, error_code);
-}
-
-void vmx_inject_extint(struct vcpu *v, int trap)
-{
- __vmx_inject_exception(v, trap, X86_EVENTTYPE_EXT_INTR,
+ __vmx_inject_exception(trap, X86_EVENTTYPE_HW_EXCEPTION, error_code);
+
+ if ( trap == TRAP_page_fault )
+ HVMTRACE_LONG_2D(PF_INJECT, error_code,
+ TRC_PAR_LONG(current->arch.hvm_vcpu.guest_cr[2]));
+ else
+ HVMTRACE_2D(INJ_EXC, trap, error_code);
+
+ if ( (trap == TRAP_debug) &&
+ (guest_cpu_user_regs()->eflags & X86_EFLAGS_TF) )
+ {
+ __restore_debug_registers(current);
+ write_debugreg(6, read_debugreg(6) | 0x4000);
+ }
+}
+
+void vmx_inject_extint(int trap)
+{
+ __vmx_inject_exception(trap, X86_EVENTTYPE_EXT_INTR,
HVM_DELIVER_NO_ERROR_CODE);
}
-void vmx_inject_nmi(struct vcpu *v)
-{
- __vmx_inject_exception(v, 2, X86_EVENTTYPE_NMI,
+void vmx_inject_nmi(void)
+{
+ __vmx_inject_exception(2, X86_EVENTTYPE_NMI,
HVM_DELIVER_NO_ERROR_CODE);
}
static void vmx_inject_exception(
unsigned int trapnr, int errcode, unsigned long cr2)
{
- struct vcpu *curr = current;
-
- vmx_inject_hw_exception(curr, trapnr, errcode);
-
if ( trapnr == TRAP_page_fault )
- curr->arch.hvm_vcpu.guest_cr[2] = cr2;
-
- if ( (trapnr == TRAP_debug) &&
- (guest_cpu_user_regs()->eflags & X86_EFLAGS_TF) )
- {
- __restore_debug_registers(curr);
- write_debugreg(6, read_debugreg(6) | 0x4000);
- }
+ current->arch.hvm_vcpu.guest_cr[2] = cr2;
+
+ vmx_inject_hw_exception(trapnr, errcode);
}
static int vmx_event_pending(struct vcpu *v)
@@ -1315,7 +1312,7 @@ static void __update_guest_eip(unsigned
}
if ( regs->eflags & X86_EFLAGS_TF )
- vmx_inject_exception(TRAP_debug, HVM_DELIVER_NO_ERROR_CODE, 0);
+ vmx_inject_hw_exception(TRAP_debug, HVM_DELIVER_NO_ERROR_CODE);
}
static void vmx_fpu_dirty_intercept(void)
@@ -1636,7 +1633,6 @@ static int vmx_msr_read_intercept(struct
{
u64 msr_content = 0;
u32 ecx = regs->ecx, eax, edx;
- struct vcpu *v = current;
HVM_DBG_LOG(DBG_LEVEL_1, "ecx=%x", ecx);
@@ -1712,7 +1708,7 @@ done:
return X86EMUL_OKAY;
gp_fault:
- vmx_inject_hw_exception(v, TRAP_gp_fault, 0);
+ vmx_inject_hw_exception(TRAP_gp_fault, 0);
return X86EMUL_EXCEPTION;
}
@@ -1849,7 +1845,7 @@ static int vmx_msr_write_intercept(struc
if ( (rc < 0) ||
(vmx_add_host_load_msr(ecx) < 0) )
- vmx_inject_hw_exception(v, TRAP_machine_check, 0);
+ vmx_inject_hw_exception(TRAP_machine_check, 0);
else
{
__vmwrite(GUEST_IA32_DEBUGCTL, msr_content);
@@ -1889,7 +1885,7 @@ static int vmx_msr_write_intercept(struc
return X86EMUL_OKAY;
gp_fault:
- vmx_inject_hw_exception(v, TRAP_gp_fault, 0);
+ vmx_inject_hw_exception(TRAP_gp_fault, 0);
return X86EMUL_EXCEPTION;
}
@@ -2197,7 +2193,7 @@ asmlinkage void vmx_vmexit_handler(struc
}
v->arch.hvm_vcpu.guest_cr[2] = exit_qualification;
- vmx_inject_hw_exception(v, TRAP_page_fault, regs->error_code);
+ vmx_inject_hw_exception(TRAP_page_fault, regs->error_code);
break;
case TRAP_nmi:
if ( (intr_info & INTR_INFO_INTR_TYPE_MASK) !=
@@ -2317,7 +2313,7 @@ asmlinkage void vmx_vmexit_handler(struc
case EXIT_REASON_VMWRITE:
case EXIT_REASON_VMXOFF:
case EXIT_REASON_VMXON:
- vmx_inject_hw_exception(v, TRAP_invalid_op, HVM_DELIVER_NO_ERROR_CODE);
+ vmx_inject_hw_exception(TRAP_invalid_op, HVM_DELIVER_NO_ERROR_CODE);
break;
case EXIT_REASON_TPR_BELOW_THRESHOLD:
@@ -2326,7 +2322,7 @@ asmlinkage void vmx_vmexit_handler(struc
case EXIT_REASON_IO_INSTRUCTION:
case EXIT_REASON_APIC_ACCESS:
if ( !handle_mmio() )
- hvm_inject_exception(TRAP_gp_fault, 0, 0);
+ vmx_inject_hw_exception(TRAP_gp_fault, 0);
break;
case EXIT_REASON_INVD:
diff -r 7e8db19d72a5 -r 7be8e7eefbd7 xen/arch/x86/hvm/vmx/vpmu_core2.c
--- a/xen/arch/x86/hvm/vmx/vpmu_core2.c Tue Nov 11 11:13:57 2008 +0000
+++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c Tue Nov 11 11:35:00 2008 +0000
@@ -335,7 +335,7 @@ static int core2_vpmu_do_wrmsr(struct cp
case MSR_CORE_PERF_GLOBAL_STATUS:
gdprintk(XENLOG_INFO, "Can not write readonly MSR: "
"MSR_PERF_GLOBAL_STATUS(0x38E)!\n");
- vmx_inject_hw_exception(current, TRAP_gp_fault, 0);
+ vmx_inject_hw_exception(TRAP_gp_fault, 0);
return 1;
case MSR_IA32_PEBS_ENABLE:
if ( msr_content & 1 )
diff -r 7e8db19d72a5 -r 7be8e7eefbd7 xen/include/asm-x86/hvm/vmx/vmx.h
--- a/xen/include/asm-x86/hvm/vmx/vmx.h Tue Nov 11 11:13:57 2008 +0000
+++ b/xen/include/asm-x86/hvm/vmx/vmx.h Tue Nov 11 11:35:00 2008 +0000
@@ -351,9 +351,9 @@ static inline int __vmxon(u64 addr)
return rc;
}
-void vmx_inject_hw_exception(struct vcpu *v, int trap, int error_code);
-void vmx_inject_extint(struct vcpu *v, int trap);
-void vmx_inject_nmi(struct vcpu *v);
+void vmx_inject_hw_exception(int trap, int error_code);
+void vmx_inject_extint(int trap);
+void vmx_inject_nmi(void);
void ept_p2m_init(struct domain *d);
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