# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1220886053 -3600
# Node ID b8734df52a903d5396117eb7099ff1ea38ac8046
# Parent 74621a2add541e2f6363f1627091bb5d5d5307f0
xentrace 6/7: Updated formats file.
Signed-off-by: George Dunlap <george.dunlap@xxxxxxxxxxxxx>
Signed-off-by: Trolle Selander <trolle.selander@xxxxxxxxxxxxx>
---
tools/xentrace/formats | 149 ++++++++++++++++++++++++++++++++-----------------
1 files changed, 100 insertions(+), 49 deletions(-)
diff -r 74621a2add54 -r b8734df52a90 tools/xentrace/formats
--- a/tools/xentrace/formats Mon Sep 08 15:58:04 2008 +0100
+++ b/tools/xentrace/formats Mon Sep 08 16:00:53 2008 +0100
@@ -4,56 +4,69 @@ 0x0001f002 CPU%(cpu)d %(tsc)d (+%(relt
0x0001f002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) wrap_buffer 0x%(1)08x
0x0001f003 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) cpu_change 0x%(1)08x
-0x0002f001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) sched_add_domain [ domid =
0x%(1)08x, edomid = 0x%(2)08x ]
-0x0002f002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) sched_rem_domain [ domid =
0x%(1)08x, edomid = 0x%(2)08x ]
-0x0002f003 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) domain_sleep [ domid =
0x%(1)08x, edomid = 0x%(2)08x ]
-0x0002f004 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) domain_wake [ domid =
0x%(1)08x, edomid = 0x%(2)08x ]
-0x0002f005 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) do_yield [ domid =
0x%(1)08x, edomid = 0x%(2)08x ]
-0x0002f006 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) do_block [ domid =
0x%(1)08x, edomid = 0x%(2)08x ]
-0x0002f007 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) domain_shutdown [
domid = 0x%(1)08x, edomid = 0x%(2)08x, reason = 0x%(3)08x ]
-0x0002f008 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) sched_ctl
-0x0002f009 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) sched_adjdom [ domid =
0x%(1)08x ]
-0x0002f00a CPU%(cpu)d %(tsc)d (+%(reltsc)8d) __enter_scheduler [
prev<domid:edomid> = 0x%(1)08x : 0x%(2)08x, next<domid:edomid> = 0x%(3)08x :
0x%(4)08x ]
-0x0002f00B CPU%(cpu)d %(tsc)d (+%(reltsc)8d) s_timer_fn
-0x0002f00c CPU%(cpu)d %(tsc)d (+%(reltsc)8d) t_timer_fn
-0x0002f00d CPU%(cpu)d %(tsc)d (+%(reltsc)8d) dom_timer_fn
-0x0002f00e CPU%(cpu)d %(tsc)d (+%(reltsc)8d) switch_infprev [ old_domid
= 0x%(1)08x, runtime = %(2)d ]
-0x0002f00f CPU%(cpu)d %(tsc)d (+%(reltsc)8d) switch_infnext [ new_domid
= 0x%(1)08x, time = %(2)d, r_time = %(3)d ]
+0x00021011 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) running_to_runnable [ dom:vcpu
= 0x%(1)08x ]
+0x00021021 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) running_to_blocked [ dom:vcpu
= 0x%(1)08x ]
+0x00021031 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) running_to_offline [ dom:vcpu
= 0x%(1)08x ]
+0x00021101 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) runnable_to_running [ dom:vcpu
= 0x%(1)08x ]
+0x00021121 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) runnable_to_blocked [ dom:vcpu
= 0x%(1)08x ]
+0x00021131 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) runnable_to_offline [ dom:vcpu
= 0x%(1)08x ]
+0x00021201 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) blocked_to_running [ dom:vcpu
= 0x%(1)08x ]
+0x00021211 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) blocked_to_runnable [ dom:vcpu
= 0x%(1)08x ]
+0x00021231 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) blocked_to_offline [ dom:vcpu
= 0x%(1)08x ]
+0x00021301 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) offline_to_running [ dom:vcpu
= 0x%(1)08x ]
+0x00021311 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) offline_to_runnable [ dom:vcpu
= 0x%(1)08x ]
+0x00021321 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) offline_to_blocked [ dom:vcpu
= 0x%(1)08x ]
-0x00081001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY [ dom:vcpu =
0x%(1)08x ]
-0x00081002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT [ dom:vcpu =
0x%(1)08x, exitcode = 0x%(2)08x, rIP = 0x%(3)08x ]
-0x00081102 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT [ dom:vcpu =
0x%(1)08x, exitcode = 0x%(2)08x, rIP = 0x%(3)016x ]
-0x00082001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) PF_XEN [ dom:vcpu =
0x%(1)08x, errorcode = 0x%(2)02x, virt = 0x%(3)08x ]
-0x00082101 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) PF_XEN [ dom:vcpu =
0x%(1)08x, errorcode = 0x%(2)02x, virt = 0x%(3)016x ]
-0x00082002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) PF_INJECT [ dom:vcpu =
0x%(1)08x, errorcode = 0x%(2)02x, virt = 0x%(3)08x ]
-0x00082102 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) PF_INJECT [ dom:vcpu =
0x%(1)08x, errorcode = 0x%(2)02x, virt = 0x%(3)016x ]
-0x00082003 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INJ_EXC [ dom:vcpu =
0x%(1)08x, vector = 0x%(2)02x, errorcode = 0x%(3)04x ]
-0x00082004 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INJ_VIRQ [ dom:vcpu =
0x%(1)08x, vector = 0x%(2)02x, fake = %(3)d ]
-0x00082005 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) REINJ_VIRQ [ dom:vcpu =
0x%(1)08x, vector = 0x%(2)02x ]
-0x00082006 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) IO_READ [ dom:vcpu =
0x%(1)08x, port = 0x%(2)04x, size = %(3)d ]
-0x00082007 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) IO_WRITE [ dom:vcpu =
0x%(1)08x, port = 0x%(2)04x, size = %(3)d ]
-0x00082008 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CR_READ [ dom:vcpu =
0x%(1)08x, CR# = %(2)d, value = 0x%(3)08x ]
-0x00082108 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CR_READ [ dom:vcpu =
0x%(1)08x, CR# = %(2)d, value = 0x%(3)016x ]
-0x00082009 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CR_WRITE [ dom:vcpu =
0x%(1)08x, CR# = %(2)d, value = 0x%(3)08x ]
-0x00082109 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CR_WRITE [ dom:vcpu =
0x%(1)08x, CR# = %(2)d, value = 0x%(3)016x ]
-0x0008200A CPU%(cpu)d %(tsc)d (+%(reltsc)8d) DR_READ [ dom:vcpu =
0x%(1)08x ]
-0x0008200B CPU%(cpu)d %(tsc)d (+%(reltsc)8d) DR_WRITE [ dom:vcpu =
0x%(1)08x ]
-0x0008200C CPU%(cpu)d %(tsc)d (+%(reltsc)8d) MSR_READ [ dom:vcpu =
0x%(1)08x, MSR# = 0x%(2)08x, value = 0x%(3)016x ]
-0x0008200D CPU%(cpu)d %(tsc)d (+%(reltsc)8d) MSR_WRITE [ dom:vcpu =
0x%(1)08x, MSR# = 0x%(2)08x, value = 0x%(3)016x ]
-0x0008200E CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CPUID [ dom:vcpu =
0x%(1)08x, func = 0x%(2)08x, eax = 0x%(3)08x, ebx = 0x%(4)08x, ecx=0x%(5)08x,
edx = 0x%(6)08x ]
-0x0008200F CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INTR [ dom:vcpu =
0x%(1)08x, vector = 0x%(2)02x ]
-0x00082010 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) NMI [ dom:vcpu =
0x%(1)08x ]
-0x00082011 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) SMI [ dom:vcpu =
0x%(1)08x ]
-0x00082012 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMMCALL [ dom:vcpu =
0x%(1)08x, func = 0x%(2)08x ]
-0x00082013 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) HLT [ dom:vcpu =
0x%(1)08x, intpending = %(2)d ]
-0x00082014 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INVLPG [ dom:vcpu =
0x%(1)08x, is invlpga? = %(2)d, virt = 0x%(3)08x ]
-0x00082114 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INVLPG [ dom:vcpu =
0x%(1)08x, is invlpga? = %(2)d, virt = 0x%(3)016x ]
-0x00082015 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) MCE [ dom:vcpu =
0x%(1)08x ]
-0x00082016 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) IO_ASSIST [ dom:vcpu =
0x%(1)08x, data = 0x%(2)04x ]
-0x00082017 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) MMIO_ASSIST [ dom:vcpu =
0x%(1)08x, data = 0x%(2)04x ]
-0x00082018 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CLTS [ dom:vcpu =
0x%(1)08x ]
-0x00082019 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) LMSW [ dom:vcpu =
0x%(1)08x, value = 0x%(2)08x ]
-0x00082119 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) LMSW [ dom:vcpu =
0x%(1)08x, value = 0x%(2)016x ]
+0x00028001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) sched_add_domain [ domid =
0x%(1)08x, edomid = 0x%(2)08x ]
+0x00028002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) sched_rem_domain [ domid =
0x%(1)08x, edomid = 0x%(2)08x ]
+0x00028003 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) domain_sleep [ domid =
0x%(1)08x, edomid = 0x%(2)08x ]
+0x00028004 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) domain_wake [ domid =
0x%(1)08x, edomid = 0x%(2)08x ]
+0x00028005 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) do_yield [ domid =
0x%(1)08x, edomid = 0x%(2)08x ]
+0x00028006 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) do_block [ domid =
0x%(1)08x, edomid = 0x%(2)08x ]
+0x00028007 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) domain_shutdown [
domid = 0x%(1)08x, edomid = 0x%(2)08x, reason = 0x%(3)08x ]
+0x00028008 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) sched_ctl
+0x00028009 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) sched_adjdom [ domid =
0x%(1)08x ]
+0x0002800a CPU%(cpu)d %(tsc)d (+%(reltsc)8d) __enter_scheduler [
prev<domid:edomid> = 0x%(1)08x : 0x%(2)08x, next<domid:edomid> = 0x%(3)08x :
0x%(4)08x ]
+0x0002800b CPU%(cpu)d %(tsc)d (+%(reltsc)8d) s_timer_fn
+0x0002800c CPU%(cpu)d %(tsc)d (+%(reltsc)8d) t_timer_fn
+0x0002800d CPU%(cpu)d %(tsc)d (+%(reltsc)8d) dom_timer_fn
+0x0002800e CPU%(cpu)d %(tsc)d (+%(reltsc)8d) switch_infprev [ old_domid
= 0x%(1)08x, runtime = %(2)d ]
+0x0002800f CPU%(cpu)d %(tsc)d (+%(reltsc)8d) switch_infnext [ new_domid
= 0x%(1)08x, time = %(2)d, r_time = %(3)d ]
+
+0x00081001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY
+0x00081002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT [ exitcode =
0x%(1)08x, rIP = 0x%(2)08x ]
+0x00081102 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT [ exitcode =
0x%(1)08x, rIP = 0x%(2)016x ]
+0x00082001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) PF_XEN [ errorcode =
0x%(2)02x, virt = 0x%(1)08x ]
+0x00082101 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) PF_XEN [ errorcode =
0x%(2)02x, virt = 0x%(1)016x ]
+0x00082002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) PF_INJECT [ errorcode =
0x%(1)02x, virt = 0x%(2)08x ]
+0x00082102 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) PF_INJECT [ errorcode =
0x%(1)02x, virt = 0x%(2)016x ]
+0x00082003 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INJ_EXC [ vector =
0x%(1)02x, errorcode = 0x%(2)04x ]
+0x00082004 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INJ_VIRQ [ vector =
0x%(1)02x, fake = %(2)d ]
+0x00082005 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) REINJ_VIRQ [ vector =
0x%(1)02x ]
+0x00082006 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) IO_READ [ port =
0x%(1)04x, size = %(2)d ]
+0x00082007 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) IO_WRITE [ port =
0x%(1)04x, size = %(2)d ]
+0x00082008 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CR_READ [ CR# = %(1)d,
value = 0x%(2)08x ]
+0x00082108 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CR_READ [ CR# = %(1)d,
value = 0x%(2)016x ]
+0x00082009 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CR_WRITE [ CR# = %(1)d,
value = 0x%(2)08x ]
+0x00082109 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CR_WRITE [ CR# = %(1)d,
value = 0x%(2)016x ]
+0x0008200A CPU%(cpu)d %(tsc)d (+%(reltsc)8d) DR_READ
+0x0008200B CPU%(cpu)d %(tsc)d (+%(reltsc)8d) DR_WRITE
+0x0008200C CPU%(cpu)d %(tsc)d (+%(reltsc)8d) MSR_READ [ MSR# =
0x%(1)08x, value = 0x%(2)016x ]
+0x0008200D CPU%(cpu)d %(tsc)d (+%(reltsc)8d) MSR_WRITE [ MSR# =
0x%(1)08x, value = 0x%(2)016x ]
+0x0008200E CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CPUID [ func =
0x%(1)08x, eax = 0x%(2)08x, ebx = 0x%(3)08x, ecx=0x%(4)08x, edx = 0x%(5)08x ]
+0x0008200F CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INTR [ vector =
0x%(1)02x ]
+0x00082010 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) NMI
+0x00082011 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) SMI
+0x00082012 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMMCALL [ func = 0x%(1)08x
]
+0x00082013 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) HLT [ intpending =
%(1)d ]
+0x00082014 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INVLPG [ is invlpga? =
%(1)d, virt = 0x%(2)08x ]
+0x00082114 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INVLPG [ is invlpga? =
%(1)d, virt = 0x%(2)016x ]
+0x00082015 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) MCE
+0x00082016 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) IO_ASSIST [ data = 0x%(1)04x
]
+0x00082017 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) MMIO_ASSIST [ data = 0x%(1)04x
]
+0x00082018 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CLTS
+0x00082019 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) LMSW [ value =
0x%(1)08x ]
+0x00082119 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) LMSW [ value =
0x%(1)016x ]
0x0010f001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) page_grant_map [ domid =
%(1)d ]
0x0010f002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) page_grant_unmap [ domid =
%(1)d ]
@@ -65,3 +78,41 @@ 0x0020f103 CPU%(cpu)d %(tsc)d (+%(relt
0x0020f103 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) trap [ rip = 0x%(1)016x,
trapnr:error = 0x%(2)08x ]
0x0020f004 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) page_fault [ eip = 0x%(1)08x,
addr = 0x%(2)08x, error = 0x%(3)08x ]
0x0020f104 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) page_fault [ rip = 0x%(1)16x,
addr = 0x%(3)16x, error = 0x%(5)08x ]
+
+0x0020f006 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) emulate_privop [ eip =
0x%(1)08x ]
+0x0020f106 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) emulate_privop [ rip =
0x%(1)16x ]
+0x0020f007 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) emulate_4G [ eip =
0x%(1)08x ]
+0x0020f107 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) emulate_4G [ rip =
0x%(1)16x ]
+0x0020f00c CPU%(cpu)d %(tsc)d (+%(reltsc)8d) ptwr_emulation_pae [ addr =
0x%(2)08x, eip = 0x%(1)08x, npte = 0x%(1)16x ]
+0x0020f10c CPU%(cpu)d %(tsc)d (+%(reltsc)8d) ptwr_emulation_pae [ addr =
0x%(2)16x, rip = 0x%(1)16x, npte = 0x%(1)16x ]
+
+0x0040f001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_not_shadow
[ gl1e = 0x%(1)16x, va = 0x%(2)08x, flags = 0x%(3)08x ]
+0x0040f101 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_not_shadow
[ gl1e = 0x%(1)16x, va = 0x%(2)16x, flags = 0x%(3)08x ]
+0x0040f002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_fast_propagate
[ va = 0x%(1)08x ]
+0x0040f102 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_fast_propagate
[ va = 0x%(1)16x ]
+0x0040f003 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_fast_mmio
[ va = 0x%(1)08x ]
+0x0040f103 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_fast_mmio
[ va = 0x%(1)16x ]
+0x0040f004 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_false_fast_path
[ va = 0x%(1)08x ]
+0x0040f104 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_false_fast_path
[ va = 0x%(1)16x ]
+0x0040f005 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_mmio
[ va = 0x%(1)08x ]
+0x0040f105 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_mmio
[ va = 0x%(1)16x ]
+0x0040f006 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_fixup
[ gl1e = 0x%(1)08x, va = 0x%(2)08x, flags = 0x%(3)08x ]
+0x0040f106 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_fixup
[ gl1e = 0x%(1)16x, va = 0x%(2)16x, flags = 0x%(3)08x ]
+0x0040f007 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_domf_dying
[ va = 0x%(1)08x ]
+0x0040f107 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_domf_dying
[ va = 0x%(1)16x ]
+0x0040f008 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_emulate
[ gl1e = 0x%(1)08x, write_val = 0x%(2)08x, va = 0x%(3)08x, flags =
0x%(4)08x, emulation_count = 0x%(5)08x]
+0x0040f108 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_emulate
[ gl1e = 0x%(1)16x, write_val = 0x%(2)16x, va = 0x%(3)16x, flags =
0x%(4)08x, emulation_count = 0x%(5)08x]
+0x0040f009 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_emulate_unshadow_user
[ va = 0x%(1)08x, gfn = 0x%(2)08x ]
+0x0040f109 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_emulate_unshadow_user
[ va = 0x%(1)16x, gfn = 0x%(2)16x ]
+0x0040f00a CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_emulate_unshadow_evtinj
[ va = 0x%(1)08x, gfn = 0x%(2)08x ]
+0x0040f10a CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_emulate_unshadow_evtinj
[ va = 0x%(1)16x, gfn = 0x%(2)16x ]
+0x0040f00b CPU%(cpu)d %(tsc)d (+%(reltsc)8d)
shadow_emulate_unshadow_unhandled [ va = 0x%(1)08x, gfn = 0x%(2)08x ]
+0x0040f10b CPU%(cpu)d %(tsc)d (+%(reltsc)8d)
shadow_emulate_unshadow_unhandled [ va = 0x%(1)16x, gfn = 0x%(2)16x ]
+0x0040f00c CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_emulate_wrmap_bf
[ gfn = 0x%(1)08x ]
+0x0040f10c CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_emulate_wrmap_bf
[ gfn = 0x%(1)16x ]
+0x0040f00d CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_emulate_prealloc_unpin
[ gfn = 0x%(1)08x ]
+0x0040f10d CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_emulate_prealloc_unpin
[ gfn = 0x%(1)16x ]
+0x0040f00e CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_emulate_resync_full
[ gfn = 0x%(1)08x ]
+0x0040f10e CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_emulate_resync_full
[ gfn = 0x%(1)16x ]
+0x0040f00f CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_emulate_resync_only
[ gfn = 0x%(1)08x ]
+0x0040f10f CPU%(cpu)d %(tsc)d (+%(reltsc)8d) shadow_emulate_resync_only
[ gfn = 0x%(1)16x ]
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