# HG changeset patch
# User Jeremy Fitzhardinge <jeremy@xxxxxxxxxxxxx>
# Date 1180009923 -3600
# Node ID 2c7154ea7eef1a7323ef2d7de3d86b96b5e12a48
# Parent f38f7f583f336aba7e70c3f46b2c7e33fd8640e1
# Parent 2623444e6d335c0b5780c01339199a2f69f79092
merged
---
tools/blktap/drivers/blktapctrl.c | 4 +++-
xen/arch/x86/hvm/svm/svm.c | 16 ++++++++++++++++
xen/arch/x86/hvm/vlapic.c | 11 ++++++-----
xen/arch/x86/mm/shadow/multi.c | 3 ++-
xen/arch/x86/x86_32/domain_page.c | 20 ++++++++------------
xen/include/asm-x86/hap.h | 12 ------------
xen/include/asm-x86/msr.h | 21 +++++++++++++++++++++
7 files changed, 56 insertions(+), 31 deletions(-)
diff -r f38f7f583f33 -r 2c7154ea7eef tools/blktap/drivers/blktapctrl.c
--- a/tools/blktap/drivers/blktapctrl.c Thu May 24 13:25:05 2007 +0100
+++ b/tools/blktap/drivers/blktapctrl.c Thu May 24 13:32:03 2007 +0100
@@ -690,8 +690,10 @@ int main(int argc, char *argv[])
/* Attach to blktap0 */
asprintf(&devname,"%s/%s0", BLKTAP_DEV_DIR, BLKTAP_DEV_NAME);
- if ((ret = xc_find_device_number("blktap0")) < 0)
+ if ((ret = xc_find_device_number("blktap0")) < 0) {
+ DPRINTF("couldn't find device number for 'blktap0'\n");
goto open_failed;
+ }
blktap_major = major(ret);
make_blktap_dev(devname,blktap_major,0);
ctlfd = open(devname, O_RDWR);
diff -r f38f7f583f33 -r 2c7154ea7eef xen/arch/x86/hvm/svm/svm.c
--- a/xen/arch/x86/hvm/svm/svm.c Thu May 24 13:25:05 2007 +0100
+++ b/xen/arch/x86/hvm/svm/svm.c Thu May 24 13:32:03 2007 +0100
@@ -177,6 +177,14 @@ static inline int long_mode_do_msr_write
if ( !svm_paging_enabled(v) )
vmcb->efer &= ~(EFER_LME | EFER_LMA);
+ break;
+
+ case MSR_K8_MC4_MISC: /* Threshold register */
+ /*
+ * MCA/MCE: Threshold register is reported to be locked, so we ignore
+ * all write accesses. This behaviour matches real HW, so guests should
+ * have no problem with this.
+ */
break;
default:
@@ -2062,6 +2070,14 @@ static inline void svm_do_msr_access(
msr_content = v->arch.hvm_svm.cpu_shadow_efer;
break;
+ case MSR_K8_MC4_MISC: /* Threshold register */
+ /*
+ * MCA/MCE: We report that the threshold register is unavailable
+ * for OS use (locked by the BIOS).
+ */
+ msr_content = 1ULL << 61; /* MC4_MISC.Locked */
+ break;
+
default:
if ( rdmsr_hypervisor_regs(ecx, &eax, &edx) ||
rdmsr_safe(ecx, eax, edx) == 0 )
diff -r f38f7f583f33 -r 2c7154ea7eef xen/arch/x86/hvm/vlapic.c
--- a/xen/arch/x86/hvm/vlapic.c Thu May 24 13:25:05 2007 +0100
+++ b/xen/arch/x86/hvm/vlapic.c Thu May 24 13:32:03 2007 +0100
@@ -918,16 +918,16 @@ int vlapic_init(struct vcpu *v)
vlapic->regs_page = alloc_domheap_page(NULL);
if ( vlapic->regs_page == NULL )
{
- dprintk(XENLOG_ERR, "malloc vlapic regs_page error for vcpu %x\n",
- v->vcpu_id);
+ dprintk(XENLOG_ERR, "alloc vlapic regs error: %d/%d\n",
+ v->domain->domain_id, v->vcpu_id);
return -ENOMEM;
}
vlapic->regs = map_domain_page_global(page_to_mfn(vlapic->regs_page));
if ( vlapic->regs == NULL )
{
- dprintk(XENLOG_ERR, "malloc vlapic regs error for vcpu %x\n",
- v->vcpu_id);
+ dprintk(XENLOG_ERR, "map vlapic regs error: %d/%d\n",
+ v->domain->domain_id, v->vcpu_id);
return -ENOMEM;
}
@@ -935,7 +935,8 @@ int vlapic_init(struct vcpu *v)
vlapic_reset(vlapic);
- vlapic->hw.apic_base_msr = MSR_IA32_APICBASE_ENABLE |
APIC_DEFAULT_PHYS_BASE;
+ vlapic->hw.apic_base_msr = (MSR_IA32_APICBASE_ENABLE |
+ APIC_DEFAULT_PHYS_BASE);
if ( v->vcpu_id == 0 )
vlapic->hw.apic_base_msr |= MSR_IA32_APICBASE_BSP;
diff -r f38f7f583f33 -r 2c7154ea7eef xen/arch/x86/mm/shadow/multi.c
--- a/xen/arch/x86/mm/shadow/multi.c Thu May 24 13:25:05 2007 +0100
+++ b/xen/arch/x86/mm/shadow/multi.c Thu May 24 13:32:03 2007 +0100
@@ -3487,6 +3487,7 @@ sh_update_cr3(struct vcpu *v, int do_loc
v->arch.paging.shadow.guest_vtable = sh_map_domain_page_global(gmfn);
/* PAGING_LEVELS==4 implies 64-bit, which means that
* map_domain_page_global can't fail */
+ BUG_ON(v->arch.paging.shadow.guest_vtable == NULL);
}
else
v->arch.paging.shadow.guest_vtable = __linear_l4_table;
@@ -3519,7 +3520,7 @@ sh_update_cr3(struct vcpu *v, int do_loc
v->arch.paging.shadow.guest_vtable = sh_map_domain_page_global(gmfn);
/* Does this really need map_domain_page_global? Handle the
* error properly if so. */
- ASSERT( v->arch.paging.shadow.guest_vtable );
+ BUG_ON(v->arch.paging.shadow.guest_vtable == NULL); /* XXX */
}
else
v->arch.paging.shadow.guest_vtable = __linear_l2_table;
diff -r f38f7f583f33 -r 2c7154ea7eef xen/arch/x86/x86_32/domain_page.c
--- a/xen/arch/x86/x86_32/domain_page.c Thu May 24 13:25:05 2007 +0100
+++ b/xen/arch/x86/x86_32/domain_page.c Thu May 24 13:32:03 2007 +0100
@@ -98,7 +98,7 @@ void *map_domain_page(unsigned long mfn)
cache->tlbflush_timestamp = tlbflush_current_time();
idx = find_first_zero_bit(cache->inuse, MAPCACHE_ENTRIES);
- ASSERT(idx < MAPCACHE_ENTRIES);
+ BUG_ON(idx >= MAPCACHE_ENTRIES);
}
set_bit(idx, cache->inuse);
@@ -218,25 +218,21 @@ void *map_domain_page_global(unsigned lo
idx = find_first_zero_bit(inuse, GLOBALMAP_BITS);
va = IOREMAP_VIRT_START + (idx << PAGE_SHIFT);
- if ( va >= FIXADDR_START )
- {
- va = 0;
- goto fail;
+ if ( unlikely(va >= FIXADDR_START) )
+ {
+ spin_unlock(&globalmap_lock);
+ return NULL;
}
}
set_bit(idx, inuse);
inuse_cursor = idx + 1;
- fail:
spin_unlock(&globalmap_lock);
- if ( likely(va != 0) )
- {
- pl2e = virt_to_xen_l2e(va);
- pl1e = l2e_to_l1e(*pl2e) + l1_table_offset(va);
- l1e_write(pl1e, l1e_from_pfn(mfn, __PAGE_HYPERVISOR));
- }
+ pl2e = virt_to_xen_l2e(va);
+ pl1e = l2e_to_l1e(*pl2e) + l1_table_offset(va);
+ l1e_write(pl1e, l1e_from_pfn(mfn, __PAGE_HYPERVISOR));
return (void *)va;
}
diff -r f38f7f583f33 -r 2c7154ea7eef xen/include/asm-x86/hap.h
--- a/xen/include/asm-x86/hap.h Thu May 24 13:25:05 2007 +0100
+++ b/xen/include/asm-x86/hap.h Thu May 24 13:32:03 2007 +0100
@@ -46,18 +46,6 @@ hap_unmap_domain_page(void *p)
hap_unmap_domain_page(void *p)
{
unmap_domain_page(p);
-}
-
-static inline void *
-hap_map_domain_page_global(mfn_t mfn)
-{
- return map_domain_page_global(mfn_x(mfn));
-}
-
-static inline void
-hap_unmap_domain_page_global(void *p)
-{
- unmap_domain_page_global(p);
}
/************************************************/
diff -r f38f7f583f33 -r 2c7154ea7eef xen/include/asm-x86/msr.h
--- a/xen/include/asm-x86/msr.h Thu May 24 13:25:05 2007 +0100
+++ b/xen/include/asm-x86/msr.h Thu May 24 13:32:03 2007 +0100
@@ -216,6 +216,27 @@ static inline void write_efer(__u64 val)
#define MSR_IA32_MC0_STATUS 0x401
#define MSR_IA32_MC0_ADDR 0x402
#define MSR_IA32_MC0_MISC 0x403
+
+/* K8 Machine Check MSRs */
+#define MSR_K8_MC1_CTL 0x404
+#define MSR_K8_MC1_STATUS 0x405
+#define MSR_K8_MC1_ADDR 0x406
+#define MSR_K8_MC1_MISC 0x407
+
+#define MSR_K8_MC2_CTL 0x408
+#define MSR_K8_MC2_STATUS 0x409
+#define MSR_K8_MC2_ADDR 0x40A
+#define MSR_K8_MC2_MISC 0x40B
+
+#define MSR_K8_MC3_CTL 0x40C
+#define MSR_K8_MC3_STATUS 0x40D
+#define MSR_K8_MC3_ADDR 0x40E
+#define MSR_K8_MC3_MISC 0x40F
+
+#define MSR_K8_MC4_CTL 0x410
+#define MSR_K8_MC4_STATUS 0x411
+#define MSR_K8_MC4_ADDR 0x412
+#define MSR_K8_MC4_MISC 0x413
/* Pentium IV performance counter MSRs */
#define MSR_P4_BPU_PERFCTR0 0x300
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