# HG changeset patch
# User awilliam@xxxxxxxxxxx
# Node ID b87ff075dab98a8e09801c6ca8633fcbe9b586bc
# Parent b20733e82ab6f6ab204a24c5779683cf79c78390
[IA64] Put guest physical translation into VHPT
Signed-off-by: Anthony Xu <anthony.xu@xxxxxxxxx>
---
xen/arch/ia64/vmx/vmx_phy_mode.c | 57 ++++++------------------------------
xen/arch/ia64/vmx/vmx_process.c | 2 -
xen/include/asm-ia64/vmx_phy_mode.h | 2 -
3 files changed, 13 insertions(+), 48 deletions(-)
diff -r b20733e82ab6 -r b87ff075dab9 xen/arch/ia64/vmx/vmx_phy_mode.c
--- a/xen/arch/ia64/vmx/vmx_phy_mode.c Thu Jun 08 11:00:09 2006 -0600
+++ b/xen/arch/ia64/vmx/vmx_phy_mode.c Thu Jun 08 11:08:35 2006 -0600
@@ -105,54 +105,19 @@ physical_mode_init(VCPU *vcpu)
}
extern void vmx_switch_rr7(unsigned long ,shared_info_t*,void *,void *,void *);
-/*void
-physical_itlb_miss(VCPU *vcpu, u64 vadr)
-{
- u64 psr;
+
+void
+physical_tlb_miss(VCPU *vcpu, u64 vadr)
+{
+ u64 pte;
IA64_PSR vpsr;
- u64 xen_mppn,xen_gppn;
vpsr.val=vmx_vcpu_get_psr(vcpu);
- xen_gppn=(vadr<<1)>>(PAGE_SHIFT+1);
- xen_mppn = gmfn_to_mfn(vcpu->domain, xen_gppn);
- xen_mppn=(xen_mppn<<PAGE_SHIFT)|(vpsr.cpl<<7);
- if(vadr>>63)
- xen_mppn |= PHY_PAGE_UC;
- else
- xen_mppn |= PHY_PAGE_WB;
-
- psr=ia64_clear_ic();
- ia64_itc(1,vadr&PAGE_MASK,xen_mppn,PAGE_SHIFT);
- ia64_set_psr(psr);
- ia64_srlz_i();
- return;
-}
-
-*/
-/*
- * vec=1, itlb miss
- * vec=2, dtlb miss
- */
-void
-physical_tlb_miss(VCPU *vcpu, u64 vadr, u64 vec)
-{
- u64 psr;
- IA64_PSR vpsr;
- u64 xen_mppn,xen_gppn;
- vpsr.val=vmx_vcpu_get_psr(vcpu);
- xen_gppn=(vadr<<1)>>(PAGE_SHIFT+1);
- xen_mppn = gmfn_to_mfn(vcpu->domain, xen_gppn);
- xen_mppn=(xen_mppn<<PAGE_SHIFT)|(vpsr.cpl<<7);
- if(vadr>>63)
- xen_mppn |= PHY_PAGE_UC;
- else
- xen_mppn |= PHY_PAGE_WB;
-
- psr=ia64_clear_ic();
- ia64_itc(vec,vadr&PAGE_MASK,xen_mppn,PAGE_SHIFT);
- ia64_set_psr(psr);
- ia64_srlz_i();
- return;
-}
+ pte = vadr& _PAGE_PPN_MASK;
+ pte = pte|(vpsr.cpl<<7)|PHY_PAGE_WB;
+ thash_purge_and_insert(vcpu, pte, (PAGE_SHIFT<<2), vadr);
+ return;
+}
+
void
vmx_init_all_rr(VCPU *vcpu)
diff -r b20733e82ab6 -r b87ff075dab9 xen/arch/ia64/vmx/vmx_process.c
--- a/xen/arch/ia64/vmx/vmx_process.c Thu Jun 08 11:00:09 2006 -0600
+++ b/xen/arch/ia64/vmx/vmx_process.c Thu Jun 08 11:08:35 2006 -0600
@@ -259,7 +259,7 @@ vmx_hpw_miss(u64 vadr , u64 vec, REGS* r
return IA64_FAULT;
}
}
- physical_tlb_miss(v, vadr, vec);
+ physical_tlb_miss(v, vadr);
return IA64_FAULT;
}
if(vec == 1) type = ISIDE_TLB;
diff -r b20733e82ab6 -r b87ff075dab9 xen/include/asm-ia64/vmx_phy_mode.h
--- a/xen/include/asm-ia64/vmx_phy_mode.h Thu Jun 08 11:00:09 2006 -0600
+++ b/xen/include/asm-ia64/vmx_phy_mode.h Thu Jun 08 11:08:35 2006 -0600
@@ -96,7 +96,7 @@ extern void recover_if_physical_mode(VCP
extern void recover_if_physical_mode(VCPU *vcpu);
extern void vmx_init_all_rr(VCPU *vcpu);
extern void vmx_load_all_rr(VCPU *vcpu);
-extern void physical_tlb_miss(VCPU *vcpu, u64 vadr, u64 vec);
+extern void physical_tlb_miss(VCPU *vcpu, u64 vadr);
/*
* No sanity check here, since all psr changes have been
* checked in switch_mm_mode().
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