[Xen-changelog] Fix the issue when guest OS clear TS bit by mov to cr0 instead of

[Xen patchbot -unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User kaf24@xxxxxxxxxxxxxxxxxxxx
# Node ID dc8122d906702a682dc896de44a32b7d27794586
# Parent  50640456147b5bba13cca2eff978393a4bcc0fcb
Fix the issue when guest OS clear TS bit by mov to cr0 instead of 
clts instruction for floating point context save and restore.
clts instruction is already handled in vmx exit handler while 
vmx_set_cr0 has not handled it yet.

Signed-off-by: Xiaofeng Ling <xiaofeng.ling@xxxxxxxxx>

diff -r 50640456147b -r dc8122d90670 xen/arch/x86/vmx.c
--- a/xen/arch/x86/vmx.c        Wed Dec 14 18:44:42 2005
+++ b/xen/arch/x86/vmx.c        Wed Dec 14 18:47:16 2005
@@ -1094,11 +1094,21 @@
     unsigned long eip;
     int paging_enabled;
     unsigned long vm_entry_value;
+    unsigned long old_cr0;
 
     /*
      * CR0: We don't want to lose PE and PG.
      */
-    paging_enabled = vmx_paging_enabled(v);
+    __vmread_vcpu(v, CR0_READ_SHADOW, &old_cr0);
+    paging_enabled = (old_cr0 & X86_CR0_PE) && (old_cr0 & X86_CR0_PG);
+    /* If OS don't use clts to clear TS bit...*/
+    if((old_cr0 & X86_CR0_TS) && !(value & X86_CR0_TS))
+    {
+            clts();
+            setup_fpu(v);
+    }
+
+
     __vmwrite(GUEST_CR0, value | X86_CR0_PE | X86_CR0_PG | X86_CR0_NE);
     __vmwrite(CR0_READ_SHADOW, value);
 

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