# HG changeset patch
# User djm@xxxxxxxxxxxxxxx
# Node ID ebc92fd2fac8f35bbeb9f101b50cb964603ed6d8
# Parent eb1ae533d480be61554f62fc368123818c7a6a6a
Code reordering for (partial) gcc3.4 compatibility
Signed-off-by Akio Takabe <takebe_akio@xxxxxxxxxxxxxx>
diff -r eb1ae533d480 -r ebc92fd2fac8 xen/arch/ia64/vmx/vmx_phy_mode.c
--- a/xen/arch/ia64/vmx/vmx_phy_mode.c Mon Oct 24 17:32:45 2005
+++ b/xen/arch/ia64/vmx/vmx_phy_mode.c Mon Oct 24 17:41:27 2005
@@ -157,13 +157,6 @@
#endif
void
-physical_itlb_miss(VCPU *vcpu, u64 vadr)
-{
- physical_itlb_miss_dom0(vcpu, vadr);
-}
-
-
-void
physical_itlb_miss_dom0(VCPU *vcpu, u64 vadr)
{
u64 psr;
@@ -183,6 +176,13 @@
ia64_set_psr(psr);
ia64_srlz_i();
return;
+}
+
+
+void
+physical_itlb_miss(VCPU *vcpu, u64 vadr)
+{
+ physical_itlb_miss_dom0(vcpu, vadr);
}
diff -r eb1ae533d480 -r ebc92fd2fac8 xen/arch/ia64/vmx/vmx_process.c
--- a/xen/arch/ia64/vmx/vmx_process.c Mon Oct 24 17:32:45 2005
+++ b/xen/arch/ia64/vmx/vmx_process.c Mon Oct 24 17:41:27 2005
@@ -56,6 +56,38 @@
extern struct ia64_sal_retval
sal_emulator(UINT64,UINT64,UINT64,UINT64,UINT64,UINT64,UINT64,UINT64);
extern void rnat_consumption (VCPU *vcpu);
#define DOMN_PAL_REQUEST 0x110000
+
+static UINT64 vec2off[68] = {0x0,0x400,0x800,0xc00,0x1000, 0x1400,0x1800,
+ 0x1c00,0x2000,0x2400,0x2800,0x2c00,0x3000,0x3400,0x3800,0x3c00,0x4000,
+ 0x4400,0x4800,0x4c00,0x5000,0x5100,0x5200,0x5300,0x5400,0x5500,0x5600,
+ 0x5700,0x5800,0x5900,0x5a00,0x5b00,0x5c00,0x5d00,0x5e00,0x5f00,0x6000,
+ 0x6100,0x6200,0x6300,0x6400,0x6500,0x6600,0x6700,0x6800,0x6900,0x6a00,
+ 0x6b00,0x6c00,0x6d00,0x6e00,0x6f00,0x7000,0x7100,0x7200,0x7300,0x7400,
+ 0x7500,0x7600,0x7700,0x7800,0x7900,0x7a00,0x7b00,0x7c00,0x7d00,0x7e00,
+ 0x7f00,
+};
+
+
+
+void vmx_reflect_interruption(UINT64 ifa,UINT64 isr,UINT64 iim,
+ UINT64 vector,REGS *regs)
+{
+ VCPU *vcpu = current;
+ UINT64 viha,vpsr = vmx_vcpu_get_psr(vcpu);
+ if(!(vpsr&IA64_PSR_IC)&&(vector!=5)){
+ panic("Guest nested fault!");
+ }
+ VCPU(vcpu,isr)=isr;
+ VCPU(vcpu,iipa) = regs->cr_iip;
+ vector=vec2off[vector];
+ if (vector == IA64_BREAK_VECTOR || vector == IA64_SPECULATION_VECTOR)
+ VCPU(vcpu,iim) = iim;
+ else {
+ set_ifa_itir_iha(vcpu,ifa,1,1,1);
+ }
+ inject_guest_interruption(vcpu, vector);
+}
+
IA64FAULT
vmx_ia64_handle_break (unsigned long ifa, struct pt_regs *regs, unsigned long
isr, unsigned long iim)
{
@@ -157,37 +189,6 @@
vmx_reflect_interruption(ifa,isr,iim,11,regs);
}
-static UINT64 vec2off[68] = {0x0,0x400,0x800,0xc00,0x1000, 0x1400,0x1800,
- 0x1c00,0x2000,0x2400,0x2800,0x2c00,0x3000,0x3400,0x3800,0x3c00,0x4000,
- 0x4400,0x4800,0x4c00,0x5000,0x5100,0x5200,0x5300,0x5400,0x5500,0x5600,
- 0x5700,0x5800,0x5900,0x5a00,0x5b00,0x5c00,0x5d00,0x5e00,0x5f00,0x6000,
- 0x6100,0x6200,0x6300,0x6400,0x6500,0x6600,0x6700,0x6800,0x6900,0x6a00,
- 0x6b00,0x6c00,0x6d00,0x6e00,0x6f00,0x7000,0x7100,0x7200,0x7300,0x7400,
- 0x7500,0x7600,0x7700,0x7800,0x7900,0x7a00,0x7b00,0x7c00,0x7d00,0x7e00,
- 0x7f00,
-};
-
-
-
-void vmx_reflect_interruption(UINT64 ifa,UINT64 isr,UINT64 iim,
- UINT64 vector,REGS *regs)
-{
- VCPU *vcpu = current;
- UINT64 viha,vpsr = vmx_vcpu_get_psr(vcpu);
- if(!(vpsr&IA64_PSR_IC)&&(vector!=5)){
- panic("Guest nested fault!");
- }
- VCPU(vcpu,isr)=isr;
- VCPU(vcpu,iipa) = regs->cr_iip;
- vector=vec2off[vector];
- if (vector == IA64_BREAK_VECTOR || vector == IA64_SPECULATION_VECTOR)
- VCPU(vcpu,iim) = iim;
- else {
- set_ifa_itir_iha(vcpu,ifa,1,1,1);
- }
- inject_guest_interruption(vcpu, vector);
-}
-
void save_banked_regs_to_vpd(VCPU *v, REGS *regs)
{
@@ -274,7 +275,7 @@
u64 vhpt_adr, gppa;
ISR misr;
ia64_rr vrr;
- REGS *regs;
+// REGS *regs;
thash_cb_t *vtlb, *vhpt;
thash_data_t *data, me;
VCPU *v = current;
diff -r eb1ae533d480 -r ebc92fd2fac8 xen/arch/ia64/xen/xentime.c
--- a/xen/arch/ia64/xen/xentime.c Mon Oct 24 17:32:45 2005
+++ b/xen/arch/ia64/xen/xentime.c Mon Oct 24 17:41:27 2005
@@ -38,20 +38,6 @@
unsigned long itc_scale, ns_scale;
unsigned long itc_at_irq;
-static inline u64 get_time_delta(void)
-{
- s64 delta_itc;
- u64 cur_itc;
-
- cur_itc = ia64_get_itc();
-
- delta_itc = (s64)(cur_itc - itc_at_irq);
-
- /* Ensure that the returned system time is monotonically increasing. */
- if ( unlikely(delta_itc < 0) ) delta_itc = 0;
- return cycle_to_ns(delta_itc);
-}
-
/* We don't expect an absolute cycle value here, since then no way
* to prevent overflow for large norminator. Normally this conversion
* is used for relative offset.
@@ -65,6 +51,21 @@
{
return (ns * ns_scale) >> 32;
}
+
+static inline u64 get_time_delta(void)
+{
+ s64 delta_itc;
+ u64 cur_itc;
+
+ cur_itc = ia64_get_itc();
+
+ delta_itc = (s64)(cur_itc - itc_at_irq);
+
+ /* Ensure that the returned system time is monotonically increasing. */
+ if ( unlikely(delta_itc < 0) ) delta_itc = 0;
+ return cycle_to_ns(delta_itc);
+}
+
s_time_t get_s_time(void)
{
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