# HG changeset patch
# User kaf24@xxxxxxxxxxxxxxxxxxxx
# Node ID 9038a369268d0552ce659cdea3f38409bbaffffc
# Parent 6e11af443eb1cc3ff5533d531ab48c9964ad2dee
Here is a patch to enable Xen to run on a Unisys ES7000 x86_64 system.
Signed-off-by: Aravindh Puthiyaparambil <aravindh.puthiyaparambil@xxxxxxxxxx>
diff -r 6e11af443eb1 -r 9038a369268d xen/include/asm-x86/mach-summit/mach_apic.h
--- a/xen/include/asm-x86/mach-summit/mach_apic.h Thu Jul 21 14:15:35 2005
+++ b/xen/include/asm-x86/mach-summit/mach_apic.h Thu Jul 21 15:50:11 2005
@@ -6,8 +6,6 @@
#define esr_disable (1)
#define NO_BALANCE_IRQ (0)
-
-#define NO_IOAPIC_CHECK (1) /* Don't check I/O APIC ID for xAPIC */
/* In clustered mode, the high nibble of APIC ID is a cluster number.
* The low nibble is a 4-bit bitmap. */
diff -r 6e11af443eb1 -r 9038a369268d xen/include/asm-x86/genapic.h
--- a/xen/include/asm-x86/genapic.h Thu Jul 21 14:15:35 2005
+++ b/xen/include/asm-x86/genapic.h Thu Jul 21 15:50:11 2005
@@ -30,7 +30,6 @@
unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
unsigned long (*check_apicid_present)(int apicid);
int no_balance_irq;
- int no_ioapic_check;
void (*init_apic_ldr)(void);
physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
@@ -78,7 +77,6 @@
.int_delivery_mode = INT_DELIVERY_MODE, \
.int_dest_mode = INT_DEST_MODE, \
.no_balance_irq = NO_BALANCE_IRQ, \
- .no_ioapic_check = NO_IOAPIC_CHECK, \
.ESR_DISABLE = esr_disable, \
.apic_destination_logical = APIC_DEST_LOGICAL, \
APICFUNC(apic_id_registered), \
diff -r 6e11af443eb1 -r 9038a369268d xen/include/asm-x86/apicdef.h
--- a/xen/include/asm-x86/apicdef.h Thu Jul 21 14:15:35 2005
+++ b/xen/include/asm-x86/apicdef.h Thu Jul 21 15:50:11 2005
@@ -108,10 +108,11 @@
#define APIC_BASE (fix_to_virt(FIX_APIC_BASE))
-#ifdef CONFIG_NUMA
- #define MAX_IO_APICS 32
+/* These limits are dictated by ES7000 hardware. */
+#ifdef __i386__
+ #define MAX_IO_APICS 65
#else
- #define MAX_IO_APICS 8
+ #define MAX_IO_APICS 129
#endif
/*
diff -r 6e11af443eb1 -r 9038a369268d xen/include/asm-x86/mach-bigsmp/mach_apic.h
--- a/xen/include/asm-x86/mach-bigsmp/mach_apic.h Thu Jul 21 14:15:35 2005
+++ b/xen/include/asm-x86/mach-bigsmp/mach_apic.h Thu Jul 21 15:50:11 2005
@@ -13,8 +13,6 @@
#define NO_BALANCE_IRQ (1)
#define esr_disable (1)
-
-#define NO_IOAPIC_CHECK (0)
static inline int apic_id_registered(void)
{
diff -r 6e11af443eb1 -r 9038a369268d xen/include/asm-x86/mach-es7000/mach_apic.h
--- a/xen/include/asm-x86/mach-es7000/mach_apic.h Thu Jul 21 14:15:35 2005
+++ b/xen/include/asm-x86/mach-es7000/mach_apic.h Thu Jul 21 15:50:11 2005
@@ -37,8 +37,6 @@
#define APIC_DEST_LOGICAL 0x0
#define WAKE_SECONDARY_VIA_INIT
#endif
-
-#define NO_IOAPIC_CHECK (1)
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
{
diff -r 6e11af443eb1 -r 9038a369268d xen/arch/x86/genapic/es7000plat.c
--- a/xen/arch/x86/genapic/es7000plat.c Thu Jul 21 14:15:35 2005
+++ b/xen/arch/x86/genapic/es7000plat.c Thu Jul 21 15:50:11 2005
@@ -136,7 +136,19 @@
es7000_plat = 0;
} else {
printk("\nEnabling ES7000 specific features...\n");
- es7000_plat = 1;
+ /*
+ * Determine the generation of the ES7000 currently running.
+ *
+ * es7000_plat = 0 if the machine is NOT a Unisys ES7000 box
+ * es7000_plat = 1 if the machine is a 5xx ES7000 box
+ * es7000_plat = 2 if the machine is a x86_64 ES7000 box
+ *
+ */
+ if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
+ es7000_plat = 2;
+ else
+ es7000_plat = 1;
+
ioapic_renumber_irq = es7000_rename_gsi;
}
return es7000_plat;
@@ -286,7 +298,7 @@
void __init
es7000_sw_apic()
{
- if (es7000_plat) {
+ if (es7000_plat == 1) {
int mip_status;
struct mip_reg es7000_mip_reg;
diff -r 6e11af443eb1 -r 9038a369268d
xen/include/asm-x86/mach-generic/mach_apic.h
--- a/xen/include/asm-x86/mach-generic/mach_apic.h Thu Jul 21 14:15:35 2005
+++ b/xen/include/asm-x86/mach-generic/mach_apic.h Thu Jul 21 15:50:11 2005
@@ -5,7 +5,6 @@
#define esr_disable (genapic->ESR_DISABLE)
#define NO_BALANCE_IRQ (genapic->no_balance_irq)
-#define NO_IOAPIC_CHECK (genapic->no_ioapic_check)
#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
#define INT_DEST_MODE (genapic->int_dest_mode)
#undef APIC_DEST_LOGICAL
diff -r 6e11af443eb1 -r 9038a369268d xen/arch/x86/mpparse.c
--- a/xen/arch/x86/mpparse.c Thu Jul 21 14:15:35 2005
+++ b/xen/arch/x86/mpparse.c Thu Jul 21 15:50:11 2005
@@ -913,7 +913,10 @@
mp_ioapics[idx].mpc_apicaddr = address;
set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
- mp_ioapics[idx].mpc_apicid = io_apic_get_unique_id(idx, id);
+ if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&
(boot_cpu_data.x86 < 15))
+ mp_ioapics[idx].mpc_apicid = io_apic_get_unique_id(idx, id);
+ else
+ mp_ioapics[idx].mpc_apicid = id;
mp_ioapics[idx].mpc_apicver = io_apic_get_version(idx);
/*
@@ -995,9 +998,9 @@
Dprintk("Bus #%d is ISA\n", MP_ISA_BUS);
/*
- * ES7000 has no legacy identity mappings
- */
- if (es7000_plat)
+ * Older generations of ES7000 have no legacy identity mappings
+ */
+ if (es7000_plat == 1)
return;
/*
@@ -1053,11 +1056,20 @@
}
}
+#define MAX_GSI_NUM 4096
+
int mp_register_gsi (u32 gsi, int edge_level, int active_high_low)
{
int ioapic = -1;
int ioapic_pin = 0;
int idx, bit = 0;
+ static int pci_irq = 16;
+ /*
+ * Mapping between Global System Interrups, which
+ * represent all possible interrupts, and IRQs
+ * assigned to actual devices.
+ */
+ static int gsi_to_irq[MAX_GSI_NUM];
#ifdef CONFIG_ACPI_BUS
/* Don't set up the ACPI SCI because it's already set up */
@@ -1092,10 +1104,25 @@
if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
- return gsi;
+ return gsi_to_irq[gsi];
}
mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
+
+ if (edge_level) {
+ /*
+ * For PCI devices assign IRQs in order, avoiding gaps
+ * due to unused I/O APIC pins.
+ */
+ int irq = gsi;
+ if (gsi < MAX_GSI_NUM) {
+ gsi = pci_irq++;
+ gsi_to_irq[irq] = gsi;
+ } else {
+ printk(KERN_ERR "GSI %u is too high\n", gsi);
+ return gsi;
+ }
+ }
io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
edge_level == ACPI_EDGE_SENSITIVE ? 0 : 1,
diff -r 6e11af443eb1 -r 9038a369268d
xen/include/asm-x86/mach-default/mach_apic.h
--- a/xen/include/asm-x86/mach-default/mach_apic.h Thu Jul 21 14:15:35 2005
+++ b/xen/include/asm-x86/mach-default/mach_apic.h Thu Jul 21 15:50:11 2005
@@ -18,8 +18,6 @@
#define NO_BALANCE_IRQ (0)
#define esr_disable (0)
-
-#define NO_IOAPIC_CHECK (0)
#define INT_DELIVERY_MODE dest_LowestPrio
#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
diff -r 6e11af443eb1 -r 9038a369268d xen/arch/x86/io_apic.c
--- a/xen/arch/x86/io_apic.c Thu Jul 21 14:15:35 2005
+++ b/xen/arch/x86/io_apic.c Thu Jul 21 15:50:11 2005
@@ -956,6 +956,13 @@
unsigned long flags;
/*
+ * Don't check I/O APIC IDs for xAPIC systems. They have
+ * no meaning without the serial APIC bus.
+ */
+ if (!(boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && boot_cpu_data.x86 <
15))
+ return;
+
+ /*
* This is broken; anything with a real cpu count has to
* circumvent this idiocy regardless.
*/
@@ -981,10 +988,6 @@
mp_ioapics[apic].mpc_apicid = reg_00.bits.ID;
}
- /* Don't check I/O APIC IDs for some xAPIC systems. They have
- * no meaning without the serial APIC bus. */
- if (NO_IOAPIC_CHECK)
- continue;
/*
* Sanity check, is the ID really free? Every APIC in a
* system must have a unique ID or we get lots of nice
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